| Message ID | 1439206118-14589-4-git-send-email-kishon@ti.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Tom Rini |
| Headers | show |
On Mon, Aug 10, 2015 at 04:58:35PM +0530, Kishon Vijay Abraham I wrote: > Add do_disable_clocks() to disable clock domains and module clocks. > These clocks are enabled using do_enable_clocks(). > > Cc: Roger Quadros <rogerq@ti.com> > Cc: Tero Kristo <t-kristo@ti.com> > Cc: Nishanth Menon <nm@ti.com> > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Hi Kishon, > Add do_disable_clocks() to disable clock domains and module clocks. > These clocks are enabled using do_enable_clocks(). Please correct the message subject. As fair as I can tell you are changing clocks on am33xx SoC, not AM43xx. > > Cc: Roger Quadros <rogerq@ti.com> > Cc: Tero Kristo <t-kristo@ti.com> > Cc: Nishanth Menon <nm@ti.com> > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > --- > arch/arm/cpu/armv7/am33xx/clock.c | 53 > ++++++++++++++++++++++++++++++ > arch/arm/include/asm/arch-am33xx/clock.h | 1 + 2 files changed, 54 > insertions(+) > > diff --git a/arch/arm/cpu/armv7/am33xx/clock.c > b/arch/arm/cpu/armv7/am33xx/clock.c index ec7d468..f6a4cee 100644 > --- a/arch/arm/cpu/armv7/am33xx/clock.c > +++ b/arch/arm/cpu/armv7/am33xx/clock.c > @@ -144,6 +144,34 @@ static inline void enable_clock_module(u32 > *const clkctrl_addr, u32 enable_mode, > wait_for_clk_enable(clkctrl_addr); } > > +static inline void wait_for_clk_disable(u32 *clkctrl_addr) > +{ > + u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL; > + u32 bound = LDELAY; > + > + while ((idlest != MODULE_CLKCTRL_IDLEST_DISABLED)) { > + clkctrl = readl(clkctrl_addr); > + idlest = (clkctrl & MODULE_CLKCTRL_IDLEST_MASK) >> > + MODULE_CLKCTRL_IDLEST_SHIFT; > + if (--bound == 0) { > + printf("Clock disable failed for 0x%p idlest > 0x%x\n", > + clkctrl_addr, clkctrl); > + return; > + } > + } > +} > + > +static inline void disable_clock_module(u32 *const clkctrl_addr, > + u32 wait_for_disable) > +{ > + clrsetbits_le32(clkctrl_addr, MODULE_CLKCTRL_MODULEMODE_MASK, > + MODULE_CLKCTRL_MODULEMODE_SW_DISABLE << > + MODULE_CLKCTRL_MODULEMODE_SHIFT); > + debug("Disable clock module - %p\n", clkctrl_addr); > + if (wait_for_disable) > + wait_for_clk_disable(clkctrl_addr); > +} > + > static inline void enable_clock_domain(u32 *const clkctrl_reg, u32 > enable_mode) { > clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK, > @@ -151,6 +179,14 @@ static inline void enable_clock_domain(u32 > *const clkctrl_reg, u32 enable_mode) debug("Enable clock domain - > %p\n", clkctrl_reg); } > > +static inline void disable_clock_domain(u32 *const clkctrl_reg) > +{ > + clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK, > + CD_CLKCTRL_CLKTRCTRL_SW_SLEEP << > + CD_CLKCTRL_CLKTRCTRL_SHIFT); > + debug("Disable clock domain - %p\n", clkctrl_reg); > +} > + > void do_enable_clocks(u32 *const *clk_domains, > u32 *const *clk_modules_explicit_en, u8 > wait_for_enable) { > @@ -170,6 +206,23 @@ void do_enable_clocks(u32 *const *clk_domains, > }; > } > > +void do_disable_clocks(u32 *const *clk_domains, > + u32 *const *clk_modules_disable, > + u8 wait_for_disable) > +{ > + u32 i, max = 100; > + > + Remove one blank line here. > + /* Clock modules that need to be put in SW_DISABLE */ > + for (i = 0; (i < max) && clk_modules_disable[i]; i++) > + disable_clock_module(clk_modules_disable[i], > + wait_for_disable); > + > + /* Put the clock domains in SW_SLEEP mode */ > + for (i = 0; (i < max) && clk_domains[i]; i++) > + disable_clock_domain(clk_domains[i]); > +} > + > /* > * Before scaling up the clocks we need to have the PMIC scale up the > * voltages first. This will be dependent on which PMIC is in use > diff --git a/arch/arm/include/asm/arch-am33xx/clock.h > b/arch/arm/include/asm/arch-am33xx/clock.h index 4af6b57..a6d2419 > 100644 --- a/arch/arm/include/asm/arch-am33xx/clock.h > +++ b/arch/arm/include/asm/arch-am33xx/clock.h > @@ -112,5 +112,6 @@ void do_setup_dpll(const struct dpll_regs *, > const struct dpll_params *); void prcm_init(void); > void enable_basic_clocks(void); > void do_enable_clocks(u32 *const *, u32 *const *, u8); > +void do_disable_clocks(u32 *const *, u32 *const *, u8); > > #endif
Hi, On Tuesday 11 August 2015 12:31 PM, Lukasz Majewski wrote: > Hi Kishon, > >> Add do_disable_clocks() to disable clock domains and module clocks. >> These clocks are enabled using do_enable_clocks(). > > Please correct the message subject. As fair as I can tell you are > changing clocks on am33xx SoC, not AM43xx. The same file is used by both am33xx and am43xx. Maybe I can change that to am33xx/am43xx. > >> >> Cc: Roger Quadros <rogerq@ti.com> >> Cc: Tero Kristo <t-kristo@ti.com> >> Cc: Nishanth Menon <nm@ti.com> >> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> >> --- >> arch/arm/cpu/armv7/am33xx/clock.c | 53 >> ++++++++++++++++++++++++++++++ >> arch/arm/include/asm/arch-am33xx/clock.h | 1 + 2 files changed, 54 >> insertions(+) >> >> diff --git a/arch/arm/cpu/armv7/am33xx/clock.c >> b/arch/arm/cpu/armv7/am33xx/clock.c index ec7d468..f6a4cee 100644 >> --- a/arch/arm/cpu/armv7/am33xx/clock.c >> +++ b/arch/arm/cpu/armv7/am33xx/clock.c >> @@ -144,6 +144,34 @@ static inline void enable_clock_module(u32 >> *const clkctrl_addr, u32 enable_mode, >> wait_for_clk_enable(clkctrl_addr); } >> >> +static inline void wait_for_clk_disable(u32 *clkctrl_addr) >> +{ >> + u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL; >> + u32 bound = LDELAY; >> + >> + while ((idlest != MODULE_CLKCTRL_IDLEST_DISABLED)) { >> + clkctrl = readl(clkctrl_addr); >> + idlest = (clkctrl & MODULE_CLKCTRL_IDLEST_MASK) >> >> + MODULE_CLKCTRL_IDLEST_SHIFT; >> + if (--bound == 0) { >> + printf("Clock disable failed for 0x%p idlest >> 0x%x\n", >> + clkctrl_addr, clkctrl); >> + return; >> + } >> + } >> +} >> + >> +static inline void disable_clock_module(u32 *const clkctrl_addr, >> + u32 wait_for_disable) >> +{ >> + clrsetbits_le32(clkctrl_addr, MODULE_CLKCTRL_MODULEMODE_MASK, >> + MODULE_CLKCTRL_MODULEMODE_SW_DISABLE << >> + MODULE_CLKCTRL_MODULEMODE_SHIFT); >> + debug("Disable clock module - %p\n", clkctrl_addr); >> + if (wait_for_disable) >> + wait_for_clk_disable(clkctrl_addr); >> +} >> + >> static inline void enable_clock_domain(u32 *const clkctrl_reg, u32 >> enable_mode) { >> clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK, >> @@ -151,6 +179,14 @@ static inline void enable_clock_domain(u32 >> *const clkctrl_reg, u32 enable_mode) debug("Enable clock domain - >> %p\n", clkctrl_reg); } >> >> +static inline void disable_clock_domain(u32 *const clkctrl_reg) >> +{ >> + clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK, >> + CD_CLKCTRL_CLKTRCTRL_SW_SLEEP << >> + CD_CLKCTRL_CLKTRCTRL_SHIFT); >> + debug("Disable clock domain - %p\n", clkctrl_reg); >> +} >> + >> void do_enable_clocks(u32 *const *clk_domains, >> u32 *const *clk_modules_explicit_en, u8 >> wait_for_enable) { >> @@ -170,6 +206,23 @@ void do_enable_clocks(u32 *const *clk_domains, >> }; >> } >> >> +void do_disable_clocks(u32 *const *clk_domains, >> + u32 *const *clk_modules_disable, >> + u8 wait_for_disable) >> +{ >> + u32 i, max = 100; >> + >> + > > Remove one blank line here. sure. Thanks Kishon
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index ec7d468..f6a4cee 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -144,6 +144,34 @@ static inline void enable_clock_module(u32 *const clkctrl_addr, u32 enable_mode, wait_for_clk_enable(clkctrl_addr); } +static inline void wait_for_clk_disable(u32 *clkctrl_addr) +{ + u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL; + u32 bound = LDELAY; + + while ((idlest != MODULE_CLKCTRL_IDLEST_DISABLED)) { + clkctrl = readl(clkctrl_addr); + idlest = (clkctrl & MODULE_CLKCTRL_IDLEST_MASK) >> + MODULE_CLKCTRL_IDLEST_SHIFT; + if (--bound == 0) { + printf("Clock disable failed for 0x%p idlest 0x%x\n", + clkctrl_addr, clkctrl); + return; + } + } +} + +static inline void disable_clock_module(u32 *const clkctrl_addr, + u32 wait_for_disable) +{ + clrsetbits_le32(clkctrl_addr, MODULE_CLKCTRL_MODULEMODE_MASK, + MODULE_CLKCTRL_MODULEMODE_SW_DISABLE << + MODULE_CLKCTRL_MODULEMODE_SHIFT); + debug("Disable clock module - %p\n", clkctrl_addr); + if (wait_for_disable) + wait_for_clk_disable(clkctrl_addr); +} + static inline void enable_clock_domain(u32 *const clkctrl_reg, u32 enable_mode) { clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK, @@ -151,6 +179,14 @@ static inline void enable_clock_domain(u32 *const clkctrl_reg, u32 enable_mode) debug("Enable clock domain - %p\n", clkctrl_reg); } +static inline void disable_clock_domain(u32 *const clkctrl_reg) +{ + clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK, + CD_CLKCTRL_CLKTRCTRL_SW_SLEEP << + CD_CLKCTRL_CLKTRCTRL_SHIFT); + debug("Disable clock domain - %p\n", clkctrl_reg); +} + void do_enable_clocks(u32 *const *clk_domains, u32 *const *clk_modules_explicit_en, u8 wait_for_enable) { @@ -170,6 +206,23 @@ void do_enable_clocks(u32 *const *clk_domains, }; } +void do_disable_clocks(u32 *const *clk_domains, + u32 *const *clk_modules_disable, + u8 wait_for_disable) +{ + u32 i, max = 100; + + + /* Clock modules that need to be put in SW_DISABLE */ + for (i = 0; (i < max) && clk_modules_disable[i]; i++) + disable_clock_module(clk_modules_disable[i], + wait_for_disable); + + /* Put the clock domains in SW_SLEEP mode */ + for (i = 0; (i < max) && clk_domains[i]; i++) + disable_clock_domain(clk_domains[i]); +} + /* * Before scaling up the clocks we need to have the PMIC scale up the * voltages first. This will be dependent on which PMIC is in use diff --git a/arch/arm/include/asm/arch-am33xx/clock.h b/arch/arm/include/asm/arch-am33xx/clock.h index 4af6b57..a6d2419 100644 --- a/arch/arm/include/asm/arch-am33xx/clock.h +++ b/arch/arm/include/asm/arch-am33xx/clock.h @@ -112,5 +112,6 @@ void do_setup_dpll(const struct dpll_regs *, const struct dpll_params *); void prcm_init(void); void enable_basic_clocks(void); void do_enable_clocks(u32 *const *, u32 *const *, u8); +void do_disable_clocks(u32 *const *, u32 *const *, u8); #endif
Add do_disable_clocks() to disable clock domains and module clocks. These clocks are enabled using do_enable_clocks(). Cc: Roger Quadros <rogerq@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- arch/arm/cpu/armv7/am33xx/clock.c | 53 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-am33xx/clock.h | 1 + 2 files changed, 54 insertions(+)