diff mbox

[U-Boot,1/5] arm1176/cpu: Match cache_flush to arm1136

Message ID 1436003324-8769-2-git-send-email-alexanders83@web.de
State Superseded
Delegated to: Tom Rini
Headers show

Commit Message

Alexander Stein July 4, 2015, 9:48 a.m. UTC
This is effectively the same code but it also does a clean cache before
invalidating and doing a memory barrier.

Signed-off-by: Alexander Stein <alexanders83@web.de>
---
 arch/arm/cpu/arm1176/cpu.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

Comments

Stephen Warren July 11, 2015, 5:20 a.m. UTC | #1
On 07/04/2015 03:48 AM, Alexander Stein wrote:
> This is effectively the same code but it also does a clean cache before
> invalidating and doing a memory barrier.

Is it possible to share this function with arm1136 rather than
cut/pasting it? I guess it's pretty small so not a huge deal, but still.
Alexander Stein July 12, 2015, 7:23 a.m. UTC | #2
On Friday 10 July 2015, 23:20:07 wrote Stephen Warren:
> On 07/04/2015 03:48 AM, Alexander Stein wrote:
> > This is effectively the same code but it also does a clean cache before
> > invalidating and doing a memory barrier.
> 
> Is it possible to share this function with arm1136 rather than
> cut/pasting it? I guess it's pretty small so not a huge deal, but still.

I guess this would be possible, but you would cross subdirectoy boundaries for arm1136 and arm1176. Dunno if this is acceptable or even if there are subtle differences between those.

Alexander
diff mbox

Patch

diff --git a/arch/arm/cpu/arm1176/cpu.c b/arch/arm/cpu/arm1176/cpu.c
index 2d81651..24b5cc7 100644
--- a/arch/arm/cpu/arm1176/cpu.c
+++ b/arch/arm/cpu/arm1176/cpu.c
@@ -41,11 +41,13 @@  int cleanup_before_linux (void)
 	return 0;
 }
 
-/* flush I/D-cache */
-static void cache_flush (void)
+static void cache_flush(void)
 {
+	unsigned long i = 0;
+	/* clean entire data cache */
+	asm volatile("mcr p15, 0, %0, c7, c10, 0" : : "r" (i));
 	/* invalidate both caches and flush btb */
-	asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (0));
+	asm volatile("mcr p15, 0, %0, c7, c7, 0" : : "r" (i));
 	/* mem barrier to sync things */
-	asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (0));
+	asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (i));
 }