| Message ID | 1426063900-7267-2-git-send-email-sr@denx.de |
|---|---|
| State | Accepted |
| Delegated to: | Tom Rini |
| Headers | show |
On Wed, Mar 11, 2015 at 09:51:38AM +0100, Stefan Roese wrote: > Without this dcache_flush the updated bootcounter may not be saved to > its location. > > This was detected on an iMX.6 platform using the OCRAM (internal SRAM) > as bootcounter storage area. And issuing "reset" from within U-Boot > cause the bootcounter to stay on its initial value. > > Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
On Wed, Mar 11, 2015 at 09:51:38AM +0100, Stefan Roese wrote: > Without this dcache_flush the updated bootcounter may not be saved to > its location. > > This was detected on an iMX.6 platform using the OCRAM (internal SRAM) > as bootcounter storage area. And issuing "reset" from within U-Boot > cause the bootcounter to stay on its initial value. > > Signed-off-by: Stefan Roese <sr@denx.de> > Reviewed-by: Tom Rini <trini@konsulko.com> OK, this breaks some platforms: powerpc: + TQM850L +(TQM850L) drivers/built-in.o: In function `bootcount_store': +(TQM850L) build/../drivers/bootcount/bootcount.c:64: undefined reference to `flush_dca che_range' +(TQM850L) make[1]: *** [u-boot] Error 1 +(TQM850L) make: *** [sub-make] Error 2 We'll see how many others have the same problem soon and then I'll decide on nuking the old platforms of holding off on this change.
On Fri, Mar 13, 2015 at 09:48:56AM -0400, Tom Rini wrote: > On Wed, Mar 11, 2015 at 09:51:38AM +0100, Stefan Roese wrote: > > > Without this dcache_flush the updated bootcounter may not be saved to > > its location. > > > > This was detected on an iMX.6 platform using the OCRAM (internal SRAM) > > as bootcounter storage area. And issuing "reset" from within U-Boot > > cause the bootcounter to stay on its initial value. > > > > Signed-off-by: Stefan Roese <sr@denx.de> > > Reviewed-by: Tom Rini <trini@konsulko.com> > > OK, this breaks some platforms: > powerpc: + TQM850L > +(TQM850L) drivers/built-in.o: In function `bootcount_store': > +(TQM850L) build/../drivers/bootcount/bootcount.c:64: undefined reference to `flush_dcache_range' > +(TQM850L) make[1]: *** [u-boot] Error 1 > +(TQM850L) make: *** [sub-make] Error 2 > > We'll see how many others have the same problem soon and then I'll > decide on nuking the old platforms of holding off on this change. Aside from the TQM 8xx family that Wolfgang owns we have mgcoge and mgcoge3ne also breaking from this (http://patchwork.ozlabs.org/patch/448849/) change. Wolfgang, Holger, how do you want to proceed? We either need cache operations or dropping bootcount from the platforms or dropping the platforms. Frankly, after looking at most of arch/powerpc/cpu/*/cache.c I suspect 8xx and 83xx just need the dummy files copied over. Thanks!
... Add a few more PowerPC people. On Fri, Mar 13, 2015 at 10:34:03AM -0400, Tom Rini wrote: > On Fri, Mar 13, 2015 at 09:48:56AM -0400, Tom Rini wrote: > > On Wed, Mar 11, 2015 at 09:51:38AM +0100, Stefan Roese wrote: > > > > > Without this dcache_flush the updated bootcounter may not be saved to > > > its location. > > > > > > This was detected on an iMX.6 platform using the OCRAM (internal SRAM) > > > as bootcounter storage area. And issuing "reset" from within U-Boot > > > cause the bootcounter to stay on its initial value. > > > > > > Signed-off-by: Stefan Roese <sr@denx.de> > > > Reviewed-by: Tom Rini <trini@konsulko.com> > > > > OK, this breaks some platforms: > > powerpc: + TQM850L > > +(TQM850L) drivers/built-in.o: In function `bootcount_store': > > +(TQM850L) build/../drivers/bootcount/bootcount.c:64: undefined reference to `flush_dcache_range' > > +(TQM850L) make[1]: *** [u-boot] Error 1 > > +(TQM850L) make: *** [sub-make] Error 2 > > > > We'll see how many others have the same problem soon and then I'll > > decide on nuking the old platforms of holding off on this change. > > Aside from the TQM 8xx family that Wolfgang owns we have mgcoge and > mgcoge3ne also breaking from this > (http://patchwork.ozlabs.org/patch/448849/) change. Wolfgang, Holger, > how do you want to proceed? We either need cache operations or dropping > bootcount from the platforms or dropping the platforms. > > Frankly, after looking at most of arch/powerpc/cpu/*/cache.c I suspect > 8xx and 83xx just need the dummy files copied over. OK, I went and poked at going one direction on this and then dug into the higher level problem more. PowerPC _needs_ the current kernel's arch/powerpc/kernel/misc_32.S relevant cache functions ported over for everyone and we should kill the dummy functions we have today. To try and encourage some folks to do this I'm going to drop this bootcount patch for now.
Tom, On 03/15/2015 11:30 AM, Tom Rini wrote: > ... Add a few more PowerPC people. > > On Fri, Mar 13, 2015 at 10:34:03AM -0400, Tom Rini wrote: >> On Fri, Mar 13, 2015 at 09:48:56AM -0400, Tom Rini wrote: >>> On Wed, Mar 11, 2015 at 09:51:38AM +0100, Stefan Roese wrote: >>> >>>> Without this dcache_flush the updated bootcounter may not be saved to >>>> its location. >>>> >>>> This was detected on an iMX.6 platform using the OCRAM (internal SRAM) >>>> as bootcounter storage area. And issuing "reset" from within U-Boot >>>> cause the bootcounter to stay on its initial value. >>>> >>>> Signed-off-by: Stefan Roese <sr@denx.de> >>>> Reviewed-by: Tom Rini <trini@konsulko.com> >>> >>> OK, this breaks some platforms: >>> powerpc: + TQM850L >>> +(TQM850L) drivers/built-in.o: In function `bootcount_store': >>> +(TQM850L) build/../drivers/bootcount/bootcount.c:64: undefined reference to `flush_dcache_range' >>> +(TQM850L) make[1]: *** [u-boot] Error 1 >>> +(TQM850L) make: *** [sub-make] Error 2 >>> >>> We'll see how many others have the same problem soon and then I'll >>> decide on nuking the old platforms of holding off on this change. >> >> Aside from the TQM 8xx family that Wolfgang owns we have mgcoge and >> mgcoge3ne also breaking from this >> (http://patchwork.ozlabs.org/patch/448849/) change. Wolfgang, Holger, >> how do you want to proceed? We either need cache operations or dropping >> bootcount from the platforms or dropping the platforms. >> >> Frankly, after looking at most of arch/powerpc/cpu/*/cache.c I suspect >> 8xx and 83xx just need the dummy files copied over. > > OK, I went and poked at going one direction on this and then dug into > the higher level problem more. PowerPC _needs_ the current kernel's > arch/powerpc/kernel/misc_32.S relevant cache functions ported over for > everyone and we should kill the dummy functions we have today. To try > and encourage some folks to do this I'm going to drop this bootcount > patch for now. > FWIW, powerpc mpc83xx, mpc85xx, mpc86xx all have flush_dcache_range() function defined. York
On Mon, Mar 16, 2015 at 08:57:02AM -0700, York Sun wrote: > Tom, > > On 03/15/2015 11:30 AM, Tom Rini wrote: > > ... Add a few more PowerPC people. > > > > On Fri, Mar 13, 2015 at 10:34:03AM -0400, Tom Rini wrote: > >> On Fri, Mar 13, 2015 at 09:48:56AM -0400, Tom Rini wrote: > >>> On Wed, Mar 11, 2015 at 09:51:38AM +0100, Stefan Roese wrote: > >>> > >>>> Without this dcache_flush the updated bootcounter may not be saved to > >>>> its location. > >>>> > >>>> This was detected on an iMX.6 platform using the OCRAM (internal SRAM) > >>>> as bootcounter storage area. And issuing "reset" from within U-Boot > >>>> cause the bootcounter to stay on its initial value. > >>>> > >>>> Signed-off-by: Stefan Roese <sr@denx.de> > >>>> Reviewed-by: Tom Rini <trini@konsulko.com> > >>> > >>> OK, this breaks some platforms: > >>> powerpc: + TQM850L > >>> +(TQM850L) drivers/built-in.o: In function `bootcount_store': > >>> +(TQM850L) build/../drivers/bootcount/bootcount.c:64: undefined reference to `flush_dcache_range' > >>> +(TQM850L) make[1]: *** [u-boot] Error 1 > >>> +(TQM850L) make: *** [sub-make] Error 2 > >>> > >>> We'll see how many others have the same problem soon and then I'll > >>> decide on nuking the old platforms of holding off on this change. > >> > >> Aside from the TQM 8xx family that Wolfgang owns we have mgcoge and > >> mgcoge3ne also breaking from this > >> (http://patchwork.ozlabs.org/patch/448849/) change. Wolfgang, Holger, > >> how do you want to proceed? We either need cache operations or dropping > >> bootcount from the platforms or dropping the platforms. > >> > >> Frankly, after looking at most of arch/powerpc/cpu/*/cache.c I suspect > >> 8xx and 83xx just need the dummy files copied over. > > > > OK, I went and poked at going one direction on this and then dug into > > the higher level problem more. PowerPC _needs_ the current kernel's > > arch/powerpc/kernel/misc_32.S relevant cache functions ported over for > > everyone and we should kill the dummy functions we have today. To try > > and encourage some folks to do this I'm going to drop this bootcount > > patch for now. > > > > FWIW, powerpc mpc83xx, mpc85xx, mpc86xx all have flush_dcache_range() function > defined. Yes and no: $ git grep -l flush_dcache_range arch/powerpc/ arch/powerpc/cpu/mpc512x/cache.c arch/powerpc/cpu/mpc5xxx/cache.c arch/powerpc/cpu/mpc83xx/cache.c arch/powerpc/cpu/mpc85xx/cache.c arch/powerpc/cpu/mpc86xx/cache.S arch/powerpc/cpu/ppc4xx/cache.S Of these only ppc4xx and mpc86xx are real functions, borrowed from the kernel long long ago. The rest are dummy functions. And we should instead make everyone have the same real functions the kernel does :)
On 03/16/2015 10:05 AM, Tom Rini wrote: >>>> 8xx and 83xx just need the dummy files copied over. >>> >>> OK, I went and poked at going one direction on this and then dug into >>> the higher level problem more. PowerPC _needs_ the current kernel's >>> arch/powerpc/kernel/misc_32.S relevant cache functions ported over for >>> everyone and we should kill the dummy functions we have today. To try >>> and encourage some folks to do this I'm going to drop this bootcount >>> patch for now. >>> >> >> FWIW, powerpc mpc83xx, mpc85xx, mpc86xx all have flush_dcache_range() function >> defined. > > Yes and no: > $ git grep -l flush_dcache_range arch/powerpc/ > arch/powerpc/cpu/mpc512x/cache.c > arch/powerpc/cpu/mpc5xxx/cache.c > arch/powerpc/cpu/mpc83xx/cache.c > arch/powerpc/cpu/mpc85xx/cache.c > arch/powerpc/cpu/mpc86xx/cache.S > arch/powerpc/cpu/ppc4xx/cache.S > > Of these only ppc4xx and mpc86xx are real functions, borrowed from the > kernel long long ago. The rest are dummy functions. And we should > instead make everyone have the same real functions the kernel does :) > Ah! I was under the impression we use it. But we actually used flush_cache() function. York
On Mon, Mar 16, 2015 at 10:11:17AM -0700, York Sun wrote: > > > On 03/16/2015 10:05 AM, Tom Rini wrote: > >>>> 8xx and 83xx just need the dummy files copied over. > >>> > >>> OK, I went and poked at going one direction on this and then dug into > >>> the higher level problem more. PowerPC _needs_ the current kernel's > >>> arch/powerpc/kernel/misc_32.S relevant cache functions ported over for > >>> everyone and we should kill the dummy functions we have today. To try > >>> and encourage some folks to do this I'm going to drop this bootcount > >>> patch for now. > >>> > >> > >> FWIW, powerpc mpc83xx, mpc85xx, mpc86xx all have flush_dcache_range() function > >> defined. > > > > Yes and no: > > $ git grep -l flush_dcache_range arch/powerpc/ > > arch/powerpc/cpu/mpc512x/cache.c > > arch/powerpc/cpu/mpc5xxx/cache.c > > arch/powerpc/cpu/mpc83xx/cache.c > > arch/powerpc/cpu/mpc85xx/cache.c > > arch/powerpc/cpu/mpc86xx/cache.S > > arch/powerpc/cpu/ppc4xx/cache.S > > > > Of these only ppc4xx and mpc86xx are real functions, borrowed from the > > kernel long long ago. The rest are dummy functions. And we should > > instead make everyone have the same real functions the kernel does :) > > Ah! I was under the impression we use it. But we actually used flush_cache() > function. Yeah, there's some related cleanup that should be done too :)
Hi Tom, On 03/13/2015 03:34 PM, Tom Rini wrote: > On Fri, Mar 13, 2015 at 09:48:56AM -0400, Tom Rini wrote: >> On Wed, Mar 11, 2015 at 09:51:38AM +0100, Stefan Roese wrote: >> >>> Without this dcache_flush the updated bootcounter may not be saved to >>> its location. >>> >>> This was detected on an iMX.6 platform using the OCRAM (internal SRAM) >>> as bootcounter storage area. And issuing "reset" from within U-Boot >>> cause the bootcounter to stay on its initial value. >>> >>> Signed-off-by: Stefan Roese <sr@denx.de> >>> Reviewed-by: Tom Rini <trini@konsulko.com> >> >> OK, this breaks some platforms: >> powerpc: + TQM850L >> +(TQM850L) drivers/built-in.o: In function `bootcount_store': >> +(TQM850L) build/../drivers/bootcount/bootcount.c:64: undefined reference to `flush_dcache_range' >> +(TQM850L) make[1]: *** [u-boot] Error 1 >> +(TQM850L) make: *** [sub-make] Error 2 >> >> We'll see how many others have the same problem soon and then I'll >> decide on nuking the old platforms of holding off on this change. > > Aside from the TQM 8xx family that Wolfgang owns we have mgcoge and > mgcoge3ne also breaking from this > (http://patchwork.ozlabs.org/patch/448849/) change. Wolfgang, Holger, > how do you want to proceed? We either need cache operations or dropping > bootcount from the platforms or dropping the platforms. > we still would like to keep mgcoge and mgcoge3ne support. These boards are still in maintenance. Unfortunately this week we are very busy. Next week Valentin or myself have planned to find some time to look at this. Regards Holger
Hi! (added a few more people to the Cc list) On 17.03.2015 10:00, Holger Brunck wrote: > Hi Tom, > > On 03/13/2015 03:34 PM, Tom Rini wrote: >> On Fri, Mar 13, 2015 at 09:48:56AM -0400, Tom Rini wrote: >>> On Wed, Mar 11, 2015 at 09:51:38AM +0100, Stefan Roese wrote: >>> >>>> Without this dcache_flush the updated bootcounter may not be saved to >>>> its location. >>>> >>>> This was detected on an iMX.6 platform using the OCRAM (internal SRAM) >>>> as bootcounter storage area. And issuing "reset" from within U-Boot >>>> cause the bootcounter to stay on its initial value. >>>> >>>> Signed-off-by: Stefan Roese <sr@denx.de> >>>> Reviewed-by: Tom Rini <trini@konsulko.com> >>> >>> OK, this breaks some platforms: >>> powerpc: + TQM850L >>> +(TQM850L) drivers/built-in.o: In function `bootcount_store': >>> +(TQM850L) build/../drivers/bootcount/bootcount.c:64: undefined reference to `flush_dcache_range' >>> +(TQM850L) make[1]: *** [u-boot] Error 1 >>> +(TQM850L) make: *** [sub-make] Error 2 >>> >>> We'll see how many others have the same problem soon and then I'll >>> decide on nuking the old platforms of holding off on this change. >> >> Aside from the TQM 8xx family that Wolfgang owns we have mgcoge and >> mgcoge3ne also breaking from this >> (http://patchwork.ozlabs.org/patch/448849/) change. Wolfgang, Holger, >> how do you want to proceed? We either need cache operations or dropping >> bootcount from the platforms or dropping the platforms. >> > > we still would like to keep mgcoge and mgcoge3ne support. These boards are still > in maintenance. Unfortunately this week we are very busy. Next week Valentin or > myself have planned to find some time to look at this. I just yesterday noticed this code for mx6: ------------------------- arch/arm/cpu/armv7/mx6/soc.c ------------------------- void enable_caches(void) { ... /* Enable caching on OCRAM and ROM */ mmu_set_region_dcache_behaviour(ROMCP_ARB_BASE_ADDR, ROMCP_ARB_END_ADDR, option); mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR, IRAM_SIZE, option); So we definitely have the dcache enabled on mx6 in the OCRAM. And this of course explains, why I need the cache flush operations in the bootcounter code. I'm not really sure if we want this area to be cached though. This got introduced with this patch: Author: Nitin Garg <nitin.garg@freescale.com> 2014-09-16 20:33:25 Committer: Stefano Babic <sbabic@denx.de> 2014-09-22 16:21:04 imx: Support i.MX6 High Assurance Boot authentication When CONFIG_SECURE_BOOT is enabled, the signed images like kernel and dtb can be authenticated using iMX6 CAAM. The added command hab_auth_img can be used for HAB authentication of images. The command takes the image DDR location, IVT (Image Vector Table) offset inside image as parameters. Detailed info about signing images can be found in Freescale AppNote AN4581. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> The cache stuff is not mentioned here in this commit log. Nitin, why did you enable the cache here? Performance reason only? If the OCRAM was uncached (again), we could really drop my patch (this mail thread) with those flush calls. So how should we proceed? Make this OCRAM area uncached again? Comments welcome... Thanks, Stefan BTW: I'm on vacation now until 8th April, so please don't expect any replies in this time.
Hi Stefan, On 03/27/2015 08:18 AM, Stefan Roese wrote: > Hi! > > (added a few more people to the Cc list) > > On 17.03.2015 10:00, Holger Brunck wrote: >> Hi Tom, >> >> On 03/13/2015 03:34 PM, Tom Rini wrote: >>> On Fri, Mar 13, 2015 at 09:48:56AM -0400, Tom Rini wrote: >>>> On Wed, Mar 11, 2015 at 09:51:38AM +0100, Stefan Roese wrote: >>>> >>>>> Without this dcache_flush the updated bootcounter may not be saved to >>>>> its location. >>>>> >>>>> This was detected on an iMX.6 platform using the OCRAM (internal SRAM) >>>>> as bootcounter storage area. And issuing "reset" from within U-Boot >>>>> cause the bootcounter to stay on its initial value. >>>>> >>>>> Signed-off-by: Stefan Roese <sr@denx.de> >>>>> Reviewed-by: Tom Rini <trini@konsulko.com> >>>> >>>> OK, this breaks some platforms: >>>> powerpc: + TQM850L >>>> +(TQM850L) drivers/built-in.o: In function `bootcount_store': >>>> +(TQM850L) build/../drivers/bootcount/bootcount.c:64: undefined reference to `flush_dcache_range' >>>> +(TQM850L) make[1]: *** [u-boot] Error 1 >>>> +(TQM850L) make: *** [sub-make] Error 2 >>>> >>>> We'll see how many others have the same problem soon and then I'll >>>> decide on nuking the old platforms of holding off on this change. >>> >>> Aside from the TQM 8xx family that Wolfgang owns we have mgcoge and >>> mgcoge3ne also breaking from this >>> (http://patchwork.ozlabs.org/patch/448849/) change. Wolfgang, Holger, >>> how do you want to proceed? We either need cache operations or dropping >>> bootcount from the platforms or dropping the platforms. >>> >> >> we still would like to keep mgcoge and mgcoge3ne support. These boards are still >> in maintenance. Unfortunately this week we are very busy. Next week Valentin or >> myself have planned to find some time to look at this. > > I just yesterday noticed this code for mx6: > > ------------------------- arch/arm/cpu/armv7/mx6/soc.c ------------------------- > void enable_caches(void) > { > ... > /* Enable caching on OCRAM and ROM */ > mmu_set_region_dcache_behaviour(ROMCP_ARB_BASE_ADDR, > ROMCP_ARB_END_ADDR, > option); > mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR, > IRAM_SIZE, > option); > > So we definitely have the dcache enabled on mx6 in the OCRAM. And this > of course explains, why I need the cache flush operations in the > bootcounter code. > > I'm not really sure if we want this area to be cached though. This got > introduced with this patch: > > Author: Nitin Garg <nitin.garg@freescale.com> 2014-09-16 20:33:25 > Committer: Stefano Babic <sbabic@denx.de> 2014-09-22 16:21:04 > > imx: Support i.MX6 High Assurance Boot authentication > > When CONFIG_SECURE_BOOT is enabled, the signed images > like kernel and dtb can be authenticated using iMX6 CAAM. > The added command hab_auth_img can be used for HAB > authentication of images. The command takes the image > DDR location, IVT (Image Vector Table) offset inside > image as parameters. Detailed info about signing images > can be found in Freescale AppNote AN4581. > > Signed-off-by: Nitin Garg <nitin.garg@freescale.com> > > The cache stuff is not mentioned here in this commit log. > Nitin, why did you enable the cache here? Performance reason > only? Seems like I missed mentioning this in the commit log, sorry. We enabled the OCRAM d-cache since it helped HAB to execute faster when authenticating OS image. The time taken to complete HAB improved by 3 times with d-cache enabled for ROM and OCRAM. This is because the HAB uses various regions of the OCRAM for data. > > If the OCRAM was uncached (again), we could really drop my patch > (this mail thread) with those flush calls. So how should we proceed? > Make this OCRAM area uncached again? > > Comments welcome... > > Thanks, > Stefan > > BTW: I'm on vacation now until 8th April, so please don't expect > any replies in this time. > Regards, Nitin
diff --git a/drivers/bootcount/bootcount.c b/drivers/bootcount/bootcount.c index e0343f7..b3e79de 100644 --- a/drivers/bootcount/bootcount.c +++ b/drivers/bootcount/bootcount.c @@ -57,9 +57,11 @@ __weak void bootcount_store(ulong a) #if defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD) raw_bootcount_store(reg, (BOOTCOUNT_MAGIC & 0xffff0000) | a); + flush_dcache_range((u32)reg, (u32)reg + 4); #else raw_bootcount_store(reg, a); raw_bootcount_store(reg + 4, BOOTCOUNT_MAGIC); + flush_dcache_range((u32)reg, (u32)reg + 8); #endif }
Without this dcache_flush the updated bootcounter may not be saved to its location. This was detected on an iMX.6 platform using the OCRAM (internal SRAM) as bootcounter storage area. And issuing "reset" from within U-Boot cause the bootcounter to stay on its initial value. Signed-off-by: Stefan Roese <sr@denx.de> --- drivers/bootcount/bootcount.c | 2 ++ 1 file changed, 2 insertions(+)