Message ID | 1409171401-22616-9-git-send-email-arnab.basu@freescale.com |
---|---|
State | Changes Requested |
Delegated to: | Albert ARIBAUD |
Headers | show |
Hi Arnab, On Thu, 28 Aug 2014 02:00:01 +0530, Arnab Basu <arnab.basu@freescale.com> wrote: > Enable the SMC instruction so that the kernel can use the psci code > > Signed-off-by: Arnab Basu <arnab.basu@freescale.com> > Reviewed-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> > Cc: Marc Zyngier <marc.zyngier@arm.com> > --- > arch/arm/include/asm/macro.h | 4 ++++ > 1 files changed, 4 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h > index 0009c28..94a1e68 100644 > --- a/arch/arm/include/asm/macro.h > +++ b/arch/arm/include/asm/macro.h > @@ -106,7 +106,11 @@ lr .req x30 > .endm > > .macro armv8_switch_to_el2_m, xreg1 > +#ifdef CONFIG_ARMV8_PSCI > + mov \xreg1, #0x531 /* Non-secure EL0/EL1 | HVC | 64bit EL2 */ > +#else > mov \xreg1, #0x5b1 /* Non-secure EL0/EL1 | HVC | 64bit EL2 */ The 'mov' lines have different constant arguments in the instruction; their explanatory comments should not be the same. > +#endif > msr scr_el3, \xreg1 > msr cptr_el3, xzr /* Disable coprocessor traps to EL3 */ > mov \xreg1, #0x33ff Amicalement,
> -----Original Message----- > From: Albert ARIBAUD [mailto:albert.u.boot@aribaud.net] > Sent: Thursday, September 18, 2014 2:48 PM > To: Basu Arnab-B45036 > Cc: marc.zyngier@arm.com; mark.rutland@arm.com; Sun York-R58495; Yoder > Stuart-B08248; u-boot@lists.denx.de > Subject: Re: [U-Boot] [PATCH 8/8] ARMv8: PSCI: Enable SMC > > Hi Arnab, > > On Thu, 28 Aug 2014 02:00:01 +0530, Arnab Basu <arnab.basu@freescale.com> > wrote: > > > Enable the SMC instruction so that the kernel can use the psci code > > > > Signed-off-by: Arnab Basu <arnab.basu@freescale.com> > > Reviewed-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> > > Cc: Marc Zyngier <marc.zyngier@arm.com> > > --- > > arch/arm/include/asm/macro.h | 4 ++++ > > 1 files changed, 4 insertions(+), 0 deletions(-) > > > > diff --git a/arch/arm/include/asm/macro.h > > b/arch/arm/include/asm/macro.h index 0009c28..94a1e68 100644 > > --- a/arch/arm/include/asm/macro.h > > +++ b/arch/arm/include/asm/macro.h > > @@ -106,7 +106,11 @@ lr .req x30 > > .endm > > > > .macro armv8_switch_to_el2_m, xreg1 > > +#ifdef CONFIG_ARMV8_PSCI > > + mov \xreg1, #0x531 /* Non-secure EL0/EL1 | HVC | 64bit EL2 */ > > +#else > > mov \xreg1, #0x5b1 /* Non-secure EL0/EL1 | HVC | 64bit EL2 */ > > The 'mov' lines have different constant arguments in the instruction; > their explanatory comments should not be the same. > Right, I'll fix the comment. Thanks Arnab > > +#endif > > msr scr_el3, \xreg1 > > msr cptr_el3, xzr /* Disable coprocessor traps to EL3 */ > > mov \xreg1, #0x33ff > > > Amicalement, > -- > Albert.
diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h index 0009c28..94a1e68 100644 --- a/arch/arm/include/asm/macro.h +++ b/arch/arm/include/asm/macro.h @@ -106,7 +106,11 @@ lr .req x30 .endm .macro armv8_switch_to_el2_m, xreg1 +#ifdef CONFIG_ARMV8_PSCI + mov \xreg1, #0x531 /* Non-secure EL0/EL1 | HVC | 64bit EL2 */ +#else mov \xreg1, #0x5b1 /* Non-secure EL0/EL1 | HVC | 64bit EL2 */ +#endif msr scr_el3, \xreg1 msr cptr_el3, xzr /* Disable coprocessor traps to EL3 */ mov \xreg1, #0x33ff