diff mbox

[U-Boot,v2,01/13] ARM: HYP/non-sec: fix alignment requirements for vectors

Message ID 1386415158-8695-2-git-send-email-marc.zyngier@arm.com
State Not Applicable
Delegated to: Albert ARIBAUD
Headers show

Commit Message

Marc Zyngier Dec. 7, 2013, 11:19 a.m. UTC
Make sure the vectors are aligned on a 32 byte boundary, not
the code that deals with it...

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 arch/arm/cpu/armv7/nonsec_virt.S | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Ian Campbell Dec. 9, 2013, 10:52 a.m. UTC | #1
On Sat, 2013-12-07 at 11:19 +0000, Marc Zyngier wrote:
> Make sure the vectors are aligned on a 32 byte boundary, not
> the code that deals with it...
> 
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

Looks like Masahiro Yamada's equivalent patch is now in the u-boot-arm
tree.

Ian.
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S
index 24b4c18..29987cd 100644
--- a/arch/arm/cpu/armv7/nonsec_virt.S
+++ b/arch/arm/cpu/armv7/nonsec_virt.S
@@ -14,6 +14,8 @@ 
 .arch_extension sec
 .arch_extension virt
 
+	.align	5				@ Minimal alignment for vectors
+
 /* the vector table for secure state and HYP mode */
 _monitor_vectors:
 	.word 0	/* reset */
@@ -32,7 +34,6 @@  _monitor_vectors:
  * to non-secure state.
  * We use only r0 and r1 here, due to constraints in the caller.
  */
-	.align	5
 _secure_monitor:
 	mrc	p15, 0, r1, c1, c1, 0		@ read SCR
 	bic	r1, r1, #0x4e			@ clear IRQ, FIQ, EA, nET bits