Message ID | 1350428767-15380-1-git-send-email-trini@ti.com |
---|---|
State | Superseded |
Delegated to: | Tom Rini |
Headers | show |
>>>>> "Tom" == Tom Rini <trini@ti.com> writes:
Tom> At some point the am335x evm hardware was updated to previosly
Tom> used in all other designs layout, so remove the now incorrect
Tom> code.
Could we please just put it under a different symbol,
E.G. CONFIG_OMAP3_SPI_SWAPPED? The board I'm working on uses the same
wiring as the old evm (E.G. transmit on D0 and receive on D1).
Tom> Signed-off-by: Tom Rini <trini@ti.com>
Tom> ---
Tom> drivers/spi/omap3_spi.c | 10 ----------
Tom> 1 file changed, 10 deletions(-)
Tom> diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
Tom> index e40a632..47f9e56 100644
Tom> --- a/drivers/spi/omap3_spi.c
Tom> +++ b/drivers/spi/omap3_spi.c
Tom> @@ -173,18 +173,8 @@ int spi_claim_bus(struct spi_slave *slave)
Tom> /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS
Tom> * REVISIT: this controller could support SPI_3WIRE mode.
Tom> */
Tom> -#ifdef CONFIG_AM33XX
Tom> - /*
Tom> - * The reference design on AM33xx has D0 and D1 wired up opposite
Tom> - * of how it has been done on previous platforms. We assume that
Tom> - * custom hardware will also follow this convention.
Tom> - */
Tom> - conf &= OMAP3_MCSPI_CHCONF_DPE0;
Tom> - conf |= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1);
The inversion seems wrong. DPE0 should be cleared and IS|DPE1 set.
Tom> -#else
Tom> conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1);
Tom> conf |= OMAP3_MCSPI_CHCONF_DPE0;
Tom> -#endif
Tom> /* wordlength */
Tom> conf &= ~OMAP3_MCSPI_CHCONF_WL_MASK;
Tom> --
Tom> 1.7.9.5
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 10/17/12 00:05, Peter Korsgaard wrote: >>>>>> "Tom" == Tom Rini <trini@ti.com> writes: > > Tom> At some point the am335x evm hardware was updated to > previosly Tom> used in all other designs layout, so remove the now > incorrect Tom> code. > > Could we please just put it under a different symbol, E.G. > CONFIG_OMAP3_SPI_SWAPPED? The board I'm working on uses the same > wiring as the old evm (E.G. transmit on D0 and receive on D1). > > > Tom> Signed-off-by: Tom Rini <trini@ti.com> Tom> --- Tom> > drivers/spi/omap3_spi.c | 10 ---------- Tom> 1 file changed, 10 > deletions(-) > > Tom> diff --git a/drivers/spi/omap3_spi.c > b/drivers/spi/omap3_spi.c Tom> index e40a632..47f9e56 100644 Tom> > --- a/drivers/spi/omap3_spi.c Tom> +++ b/drivers/spi/omap3_spi.c > Tom> @@ -173,18 +173,8 @@ int spi_claim_bus(struct spi_slave > *slave) Tom> /* standard 4-wire master mode: SCK, MOSI/out, > MISO/in, nCS Tom> * REVISIT: this controller could support > SPI_3WIRE mode. Tom> */ Tom> -#ifdef CONFIG_AM33XX Tom> - /* > Tom> - * The reference design on AM33xx has D0 and D1 wired up > opposite Tom> - * of how it has been done on previous platforms. We > assume that Tom> - * custom hardware will also follow this > convention. Tom> - */ Tom> - conf &= OMAP3_MCSPI_CHCONF_DPE0; Tom> > - conf |= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); > > The inversion seems wrong. DPE0 should be cleared and IS|DPE1 set. > > > Tom> -#else Tom> conf &= > ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); Tom> conf |= > OMAP3_MCSPI_CHCONF_DPE0; Tom> -#endif > > Tom> /* wordlength */ Tom> conf &= > ~OMAP3_MCSPI_CHCONF_WL_MASK; Alright, can you post a patch that works for you? Thanks! - -- Tom -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://www.enigmail.net/ iQIcBAEBAgAGBQJQfsG7AAoJENk4IS6UOR1WbskP/1EPbY/pFTsOCRHC8ee6Q/Sj Vlm2vUOV9SbzmKn+AO8vZr90bB5Orf2nLSGXmGMF/VO0j3WLZh4lzIVXCesWJfu5 FgofsfmPZRxeX7y/Y1edudy68jRbf2080WglbZP5JJK6EEMuM1juKlgufj0Km7C6 uyDurQ9ew0obNf8qQVkGJghxIVrQheoMTg9rEWD8HTBxT4YdKarJ1CtL8Tu88YL1 7L1FStrqQ1A/aRNxw8wyEf7aKhquoj5nQsk/zNXMj43lyR4e8Rcm8+z/ujeflfgk 62ZYvfEGlC8K3fp9e4IGN36h+WfxteMCTXR/PEmzSyZiipZzD7hRtwQ0TafxcztV ADE66Rpt26MPQNnxTWVi2Dswa5ICctwdmcxDsib8RbGFh4BcaMlBz7vRkFgTX33j 7KfKWZ9uiHouzz/4IfIG1pbdbCAjokHaMRFMKlF4R+btY1y/C2ZIofLWRprnBlXA ss+wh1nfUooVGL/rG81zdZBLM1qKF+tax7bzPWxEWGTc7KsugR52FvTo+1uTnLxR LIEY8V0Kp5EFIPBzEKTy760BrvRF6W62+qLtczBso7p8RKQ0p/ubGNEXxleQZsFa KE7tCpT1huO5Rg5ls6dOkouAiGvXxaweK/HJlSf7pqgPj0sQec261OkmGCLhAApm Ir4Xb101MuKipeoh9mBJ =+RCa -----END PGP SIGNATURE-----
>>>>> "Tom" == Tom Rini <trini@ti.com> writes:
Hi,
Tom> Alright, can you post a patch that works for you? Thanks!
Sure, will do so now.
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index e40a632..47f9e56 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -173,18 +173,8 @@ int spi_claim_bus(struct spi_slave *slave) /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS * REVISIT: this controller could support SPI_3WIRE mode. */ -#ifdef CONFIG_AM33XX - /* - * The reference design on AM33xx has D0 and D1 wired up opposite - * of how it has been done on previous platforms. We assume that - * custom hardware will also follow this convention. - */ - conf &= OMAP3_MCSPI_CHCONF_DPE0; - conf |= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); -#else conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); conf |= OMAP3_MCSPI_CHCONF_DPE0; -#endif /* wordlength */ conf &= ~OMAP3_MCSPI_CHCONF_WL_MASK;
At some point the am335x evm hardware was updated to previosly used in all other designs layout, so remove the now incorrect code. Signed-off-by: Tom Rini <trini@ti.com> --- drivers/spi/omap3_spi.c | 10 ---------- 1 file changed, 10 deletions(-)