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[U-Boot] OMAP3: add definition of CTRL_WKUP_CTRL register

Message ID 1346067432-25711-1-git-send-email-arnout@mind.be
State Accepted
Delegated to: Tom Rini
Headers show

Commit Message

Arnout Vandecappelle Aug. 27, 2012, 11:37 a.m. UTC 
From: "Arnout Vandecappelle (Essensium/Mind)" <arnout@mind.be>

AM/DM37x SoCs add the CTRL_WKUP_CTRL register.  It contains the
GPIO_IO_PWRDNZ bit, which is required to be set to enable the I/O pads
of gpio_126, gpio_127 and gpio_129.

Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Cc: Tom Rini <trini@ti.com>
---
 arch/arm/include/asm/arch-omap3/mux.h |    5 +++++
 1 file changed, 5 insertions(+)
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Patch

diff --git a/arch/arm/include/asm/arch-omap3/mux.h b/arch/arm/include/asm/arch-omap3/mux.h
index 71f183d..6e92b23 100644
--- a/arch/arm/include/asm/arch-omap3/mux.h
+++ b/arch/arm/include/asm/arch-omap3/mux.h
@@ -451,6 +451,11 @@ 
 #define CONTROL_PADCONF_GPIO128		0x0A58
 #define CONTROL_PADCONF_GPIO129		0x0A5A
 
+/* AM/DM37xx specific: gpio_127, gpio_127 and gpio_129 require configuration
+ * of the extended drain cells */
+#define OMAP34XX_CTRL_WKUP_CTRL		(OMAP34XX_CTRL_BASE + 0x0A5C)
+#define OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ	(1<<6)
+
 #define MUX_VAL(OFFSET,VALUE)\
 	writew((VALUE), OMAP34XX_CTRL_BASE + (OFFSET));