[U-Boot,RESEND,11/11] snowball: Adding board specific cache cleanup routine

From: "Mathieu J. Poirier" <mathieu.poirier@linaro.org>

Following ARM's reference manuel for initializing the cache - the
kernel won't boot otherwise.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
---
Changes for v2:
   - Correcting cache maintenance register address.
   - Invalidating all 16 bits in cache maintenance register.
   - Polling cache maintenance register for cleared bits.
   - Added comments to the code.
   - Re-worked commit description.
---
 arch/arm/cpu/armv7/u8500/cpu.c |   16 ++++++++++++++++
 1 files changed, 16 insertions(+), 0 deletions(-)

Dear mathieu.poirier@linaro.org,

In message <1341413915-7944-12-git-send-email-mathieu.poirier@linaro.org> you wrote:
> From: "Mathieu J. Poirier" <mathieu.poirier@linaro.org>
> 
> Following ARM's reference manuel for initializing the cache - the
> kernel won't boot otherwise.
> 
> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: John Rigby <john.rigby@linaro.org>
> ---
> Changes for v2:
>    - Correcting cache maintenance register address.
>    - Invalidating all 16 bits in cache maintenance register.
>    - Polling cache maintenance register for cleared bits.
>    - Added comments to the code.
>    - Re-worked commit description.
> ---
>  arch/arm/cpu/armv7/u8500/cpu.c |   16 ++++++++++++++++
>  1 files changed, 16 insertions(+), 0 deletions(-)
...
> +void cpu_cache_initialization(void)
> +{
> +	/* invalidate all cache entries */
> +	*((volatile unsigned int *)(0xA041277C)) = 0xFFFF;
...
> +	while (*((volatile unsigned int *)(0xA041277C)) & 0xFF)
...
> +	*((volatile unsigned int *)(0xA0412900)) = 0xFF;
> +	*((volatile unsigned int *)(0xA0412904)) = 0xFF;

NAK.  Please use proper I/O accessors, and declare a C struct to
access these registers.

Best regards,

Wolfgang Denk

On 12-07-04 12:53 PM, Wolfgang Denk wrote:
> Dear mathieu.poirier@linaro.org,
> 
> In message <1341413915-7944-12-git-send-email-mathieu.poirier@linaro.org> you wrote:
>> From: "Mathieu J. Poirier" <mathieu.poirier@linaro.org>
>>
>> Following ARM's reference manuel for initializing the cache - the
>> kernel won't boot otherwise.
>>
>> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
>> Signed-off-by: John Rigby <john.rigby@linaro.org>
>> ---
>> Changes for v2:
>>    - Correcting cache maintenance register address.
>>    - Invalidating all 16 bits in cache maintenance register.
>>    - Polling cache maintenance register for cleared bits.
>>    - Added comments to the code.
>>    - Re-worked commit description.
>> ---
>>  arch/arm/cpu/armv7/u8500/cpu.c |   16 ++++++++++++++++
>>  1 files changed, 16 insertions(+), 0 deletions(-)
> ...
>> +void cpu_cache_initialization(void)
>> +{
>> +	/* invalidate all cache entries */
>> +	*((volatile unsigned int *)(0xA041277C)) = 0xFFFF;
> ...
>> +	while (*((volatile unsigned int *)(0xA041277C)) & 0xFF)
> ...
>> +	*((volatile unsigned int *)(0xA0412900)) = 0xFF;
>> +	*((volatile unsigned int *)(0xA0412904)) = 0xFF;
> 
> NAK.  Please use proper I/O accessors, and declare a C struct to
> access these registers.

Ok, to make sure I do this properly please point me to an example in the
code base where I can find I/O accessors.

Also, could you be more specific about the C struct you're like to see
implemented - again and example in the code would be welcomed.

Thanks,
Mathieu.

> 
> Best regards,
> 
> Wolfgang Denk
>

On Wed, Jul 4, 2012 at 4:53 PM, Mathieu Poirier
<mathieu.poirier@linaro.org> wrote:

>> NAK.  Please use proper I/O accessors, and declare a C struct to
>> access these registers.
>
> Ok, to make sure I do this properly please point me to an example in the
> code base where I can find I/O accessors.

Take at how the registers are read/written at  look at
arch/arm/cpu/armv7/mx6/soc.c , for example.

Regards,

Fabio Estevam

Dear Mathieu,

In message <4FF49F2C.1030301@linaro.org> you wrote:
>
> >> +	*((volatile unsigned int *)(0xA0412900)) = 0xFF;
> >> +	*((volatile unsigned int *)(0xA0412904)) = 0xFF;
> > 
> > NAK.  Please use proper I/O accessors, and declare a C struct to
> > access these registers.
> 
> Ok, to make sure I do this properly please point me to an example in the
> code base where I can find I/O accessors.
> 
> Also, could you be more specific about the C struct you're like to see
> implemented - again and example in the code would be welcomed.

See arch/arm/include/asm/io.h for the respective I/O accessors.

As I have no idea which registers might be hidden by these magig
numbers 0xA0412900 or 0xA0412904 it's hard for me to find any good
example.  See for example accesses like the

	writel(val, &ccm->cgr0);

in arch/arm/cpu/arm926ejs/mx25/generic.c, etc. etc.

Best regards,

Wolfgang Denk