| Message ID | 1339104480-6191-1-git-send-email-dinguyen@altera.com |
|---|---|
| State | Superseded |
| Headers | show |
Dear Dinh, In message <1339104480-6191-1-git-send-email-dinguyen@altera.com> you wrote: > This commit is an add-on to f6c4191f. There are a few other registers where > consecutive writes must have a delay. Sorry, but this commit message is misleading - I was expecting to see something like udelay() in the code, but there wasn't any... > Signed-off-by: Dinh Nguyen <dinguyen@altera.com> > --- > drivers/net/designware.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/designware.c b/drivers/net/designware.c > index e8e669b..34952c0 100644 > --- a/drivers/net/designware.c > +++ b/drivers/net/designware.c > @@ -163,8 +163,8 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis) > writel(FIXEDBURST | PRIORXTX_41 | BURST_16, > &dma_p->busmode); > > - writel(FLUSHTXFIFO | readl(&dma_p->opmode), &dma_p->opmode); > - writel(STOREFORWARD | TXSECONDFRAME, &dma_p->opmode); > + writel(readl(&dma_p->opmode) | FLUSHTXFIFO | STOREFORWARD | \ > + TXSECONDFRAME, &dma_p->opmode); There is no need for the continuation line here; please drop the backslash. Hm... Should we not rather use something like setbits_le32() here? Best regards, Wolfgang Denk
Dear Dinh, In message <71B37E0559AC6849A68C5BA94C509FB458298D3C24@SJ-ITMSG02.altera.priv.altera.com> you wrote: > > > Sorry, but this commit message is misleading - I was expecting to see > > something like udelay() in the code, but there wasn't any... > > Combining the 2 individual writes into a single write will also work. > I'm just keeping in sync with commit # f6c4191f. I understand this - but the commit message should match the code. > Again, just keeping the code in sync with the previous commit that address this issue. If you like, I can change it to setbits_le32(). I think it would be cleaner, but if the rest of the code looks like that, I will not insist. Best regards, Wolfgang Denk
diff --git a/drivers/net/designware.c b/drivers/net/designware.c index e8e669b..34952c0 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -163,8 +163,8 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis) writel(FIXEDBURST | PRIORXTX_41 | BURST_16, &dma_p->busmode); - writel(FLUSHTXFIFO | readl(&dma_p->opmode), &dma_p->opmode); - writel(STOREFORWARD | TXSECONDFRAME, &dma_p->opmode); + writel(readl(&dma_p->opmode) | FLUSHTXFIFO | STOREFORWARD | \ + TXSECONDFRAME, &dma_p->opmode); conf = FRAMEBURSTENABLE | DISABLERXOWN;
This commit is an add-on to f6c4191f. There are a few other registers where consecutive writes must have a delay. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> --- drivers/net/designware.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)