Message ID | 1323186582-2811-3-git-send-email-trini@ti.com |
---|---|
State | Deferred |
Delegated to: | Tom Rini |
Headers | show |
diff --git a/arch/arm/cpu/armv7/omap3/mem.c b/arch/arm/cpu/armv7/omap3/mem.c index 2fe5ac7..4a8c025 100644 --- a/arch/arm/cpu/armv7/omap3/mem.c +++ b/arch/arm/cpu/armv7/omap3/mem.c @@ -142,13 +142,6 @@ void gpmc_init(void) config &= (~0xf00); writel(config, &gpmc_cfg->config); - /* - * Disable the GPMC0 config set by ROM code - * It conflicts with our MPDB (both at 0x08000000) - */ - writel(0, &gpmc_cfg->cs[0].config7); - sdelay(1000); - #if defined(CONFIG_CMD_NAND) /* CS 0 */ gpmc_config = gpmc_m_nand;
gpmc_init() was disabling chip select 0 and then waiting the required amount of time for the change to settle before calling enable_gpmc_cs_config on CS 0 which starts by disabling and then sleeping. Remove this redundancy. Signed-off-by: Tom Rini <trini@ti.com> --- arch/arm/cpu/armv7/omap3/mem.c | 7 ------- 1 files changed, 0 insertions(+), 7 deletions(-)