| Message ID | 1322143076-20349-9-git-send-email-daniel.schwierzeck@googlemail.com |
|---|---|
| State | Superseded |
| Headers | show |
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> > --- > arch/mips/cpu/mips32/start.S | 21 +++++++++++++++++++-- > 1 files changed, 19 insertions(+), 2 deletions(-) > > diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S > index b6cb4be..03cfd5a 100644 > --- a/arch/mips/cpu/mips32/start.S > +++ b/arch/mips/cpu/mips32/start.S > @@ -206,11 +206,28 @@ _start: > RVECENT(romReserved,125) > RVECENT(romReserved,126) > RVECENT(romReserved,127) > + XVECENT(romExcHandle,0x400); > + RVECENT(romReserved,129); > + RVECENT(romReserved,130); > + RVECENT(romReserved,131); > + RVECENT(romReserved,132); > + RVECENT(romReserved,133); > + RVECENT(romReserved,134); > + RVECENT(romReserved,135); > + RVECENT(romReserved,136); > + RVECENT(romReserved,137); > + RVECENT(romReserved,138); > + RVECENT(romReserved,139); > + RVECENT(romReserved,140); > + RVECENT(romReserved,141); > + RVECENT(romReserved,142); > + RVECENT(romReserved,143); > + XVECENT(romExcHandle,0x480); # bfc00480: EJTAG debug exception Use .rept maybe to avoid this copy-paste? > > /* > * We hope there are no more reserved vectors! > - * 128 * 8 == 1024 == 0x400 > - * so this is address R_VEC+0x400 == 0xbfc00400 > + * 144 * 8 == 1152 == 0x480 > + * so this is address R_VEC+0x480 == 0xbfc00480 > */ > .align 4 > reset: M
On 11/24/11 10:57 PM, Daniel Schwierzeck wrote: > @@ -206,11 +206,28 @@ _start: > RVECENT(romReserved,125) > RVECENT(romReserved,126) > RVECENT(romReserved,127) > + XVECENT(romExcHandle,0x400); > + RVECENT(romReserved,129); > + RVECENT(romReserved,130); > + RVECENT(romReserved,131); > + RVECENT(romReserved,132); > + RVECENT(romReserved,133); > + RVECENT(romReserved,134); > + RVECENT(romReserved,135); > + RVECENT(romReserved,136); > + RVECENT(romReserved,137); > + RVECENT(romReserved,138); > + RVECENT(romReserved,139); > + RVECENT(romReserved,140); > + RVECENT(romReserved,141); > + RVECENT(romReserved,142); > + RVECENT(romReserved,143); > + XVECENT(romExcHandle,0x480); # bfc00480: EJTAG debug exception > > /* > * We hope there are no more reserved vectors! > - * 128 * 8 == 1024 == 0x400 > - * so this is address R_VEC+0x400 == 0xbfc00400 > + * 144 * 8 == 1152 == 0x480 > + * so this is address R_VEC+0x480 == 0xbfc00480 > */ > .align 4 > reset: IIUC those exception vectors of +0x400/+0x480 have nothing to do with 24K processor core nor 34K either. The change itself is Ok, and any other version taking Marek's comment into account is also welcome.
On Mon, Nov 28, 2011 at 5:48 PM, Shinya Kuribayashi <skuribay@pobox.com> wrote: > On 11/24/11 10:57 PM, Daniel Schwierzeck wrote: >> >> @@ -206,11 +206,28 @@ _start: >> RVECENT(romReserved,125) >> RVECENT(romReserved,126) >> RVECENT(romReserved,127) >> + XVECENT(romExcHandle,0x400); >> + RVECENT(romReserved,129); >> + RVECENT(romReserved,130); >> + RVECENT(romReserved,131); >> + RVECENT(romReserved,132); >> + RVECENT(romReserved,133); >> + RVECENT(romReserved,134); >> + RVECENT(romReserved,135); >> + RVECENT(romReserved,136); >> + RVECENT(romReserved,137); >> + RVECENT(romReserved,138); >> + RVECENT(romReserved,139); >> + RVECENT(romReserved,140); >> + RVECENT(romReserved,141); >> + RVECENT(romReserved,142); >> + RVECENT(romReserved,143); >> + XVECENT(romExcHandle,0x480); # bfc00480: EJTAG debug exception >> >> /* >> * We hope there are no more reserved vectors! >> - * 128 * 8 == 1024 == 0x400 >> - * so this is address R_VEC+0x400 == 0xbfc00400 >> + * 144 * 8 == 1152 == 0x480 >> + * so this is address R_VEC+0x480 == 0xbfc00480 >> */ >> .align 4 >> reset: > > IIUC those exception vectors of +0x400/+0x480 have nothing to do with > 24K processor core nor 34K either. yes you're right. The 4K core (and others) also have an EJTAG exception vector at 0x480. I'll rename the patch subject. > > The change itself is Ok, and any other version taking Marek's comment > into account is also welcome. > > ok then I'll rewrite the RVECENT and XVECENT macros and the complete exception vector setup to get rid of the already existing copy&paste code.
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S index b6cb4be..03cfd5a 100644 --- a/arch/mips/cpu/mips32/start.S +++ b/arch/mips/cpu/mips32/start.S @@ -206,11 +206,28 @@ _start: RVECENT(romReserved,125) RVECENT(romReserved,126) RVECENT(romReserved,127) + XVECENT(romExcHandle,0x400); + RVECENT(romReserved,129); + RVECENT(romReserved,130); + RVECENT(romReserved,131); + RVECENT(romReserved,132); + RVECENT(romReserved,133); + RVECENT(romReserved,134); + RVECENT(romReserved,135); + RVECENT(romReserved,136); + RVECENT(romReserved,137); + RVECENT(romReserved,138); + RVECENT(romReserved,139); + RVECENT(romReserved,140); + RVECENT(romReserved,141); + RVECENT(romReserved,142); + RVECENT(romReserved,143); + XVECENT(romExcHandle,0x480); # bfc00480: EJTAG debug exception /* * We hope there are no more reserved vectors! - * 128 * 8 == 1024 == 0x400 - * so this is address R_VEC+0x400 == 0xbfc00400 + * 144 * 8 == 1152 == 0x480 + * so this is address R_VEC+0x480 == 0xbfc00480 */ .align 4 reset:
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> --- arch/mips/cpu/mips32/start.S | 21 +++++++++++++++++++-- 1 files changed, 19 insertions(+), 2 deletions(-)