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[U-Boot,v2,8/14] mtd: sunxi: Change U-Boot offset

Message ID 08d9067e6b3d30d9f197856214d5e693d8e3a309.1479817585.git-series.maxime.ripard@free-electrons.com
State Accepted
Commit adc706b2fef764d359f1049e94d971b13250735a
Delegated to: Jagannadha Sutradharudu Teki
Headers show

Commit Message

Maxime Ripard Nov. 22, 2016, 12:38 p.m. UTC
The default U-Boot offset for the Allwinner SoCs was set to 32kB.

This was probably to try to maintain some compatibility with the current
image that we build for the MMC where the U-Boot binary is also located at
a 32kB offset.

However, this causes a number of issues. The first one is that it prevents
us from using a backup SPL entirely, which is troublesome in case where the
first would be corrupt (especially on MLC which have a higher number of
bitflips).

We also cannot use the original MMC image on the NAND, because we need to
prepare the SPL image to include the ECCs and randomizer settings, which
reduces the interest of setting it at that particular offset.

It also prevents us from upgrading and flashing the U-Boot and SPLs
independantly, since it's very likely that it will fall in the same erase
block.

Since that default wasn't used by any board, change it for 8MB, which will
be in an erase block of its own, all the erase blocks being multiple of
two. The highest erase block size we encountered is 4MB, which means that
in this particular setup, the first and second erase blocks will be for the
SPL and its backup, and the third for U-Boot.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/mtd/nand/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Tom Rini Nov. 22, 2016, 3:20 p.m. UTC | #1
On Tue, Nov 22, 2016 at 01:38:38PM +0100, Maxime Ripard wrote:

> The default U-Boot offset for the Allwinner SoCs was set to 32kB.
> 
> This was probably to try to maintain some compatibility with the current
> image that we build for the MMC where the U-Boot binary is also located at
> a 32kB offset.
> 
> However, this causes a number of issues. The first one is that it prevents
> us from using a backup SPL entirely, which is troublesome in case where the
> first would be corrupt (especially on MLC which have a higher number of
> bitflips).
> 
> We also cannot use the original MMC image on the NAND, because we need to
> prepare the SPL image to include the ECCs and randomizer settings, which
> reduces the interest of setting it at that particular offset.
> 
> It also prevents us from upgrading and flashing the U-Boot and SPLs
> independantly, since it's very likely that it will fall in the same erase
> block.
> 
> Since that default wasn't used by any board, change it for 8MB, which will
> be in an erase block of its own, all the erase blocks being multiple of
> two. The highest erase block size we encountered is 4MB, which means that
> in this particular setup, the first and second erase blocks will be for the
> SPL and its backup, and the third for U-Boot.
> 
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Reviewed-by: Tom Rini <trini@konsulko.com>
diff mbox

Patch

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 2cc9e513d2e9..505102440609 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -121,7 +121,7 @@  config SYS_NAND_U_BOOT_LOCATIONS
 
 config SYS_NAND_U_BOOT_OFFS
 	hex "Location in NAND to read U-Boot from"
-	default 0x8000 if NAND_SUNXI
+	default 0x800000 if NAND_SUNXI
 	depends on SYS_NAND_U_BOOT_LOCATIONS
 	help
 	Set the offset from the start of the nand where u-boot should be