| Message ID | 20240919-imx9-update-v2-0-0d798d9e08ad@nxp.com |
|---|---|
| Headers | show |
| Series | imx9: various update | expand |
Hi Peng, On Wed, Sep 18, 2024 at 9:14 PM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote: > Peng Fan (12): > imx9: soc: wait ssar when power on power domain > imx9: soc: Change FSB directly access to fuse API > imx9: soc: Print ELE information > imx8m: soc: Drop disable_pmu_cpu_nodes > imx: Generalize disable_cpu_nodes > imx9: soc: Disable cpu1 for variants that only has one A55 core > imx: Generalize fixup_thermal_trips This one fails to apply to the next branch. Please rebase and resend.
Hi Fabio, > -----Original Message----- > From: Fabio Estevam <festevam@gmail.com> > Sent: Thursday, September 19, 2024 10:36 AM > To: Peng Fan (OSS) <peng.fan@oss.nxp.com> > Cc: Stefano Babic <sbabic@denx.de>; dl-uboot-imx <uboot- > imx@nxp.com>; u-boot@lists.denx.de; Peng Fan <peng.fan@nxp.com>; > Ye Li <ye.li@nxp.com>; Frank Li <frank.li@nxp.com>; Jacky Bai > <ping.bai@nxp.com> > Subject: Re: [PATCH v2 00/21] imx9: various update > > Hi Peng, > > On Wed, Sep 18, 2024 at 9:14 PM Peng Fan (OSS) > <peng.fan@oss.nxp.com> wrote: > > > Peng Fan (12): > > imx9: soc: wait ssar when power on power domain > > imx9: soc: Change FSB directly access to fuse API > > imx9: soc: Print ELE information > > imx8m: soc: Drop disable_pmu_cpu_nodes > > imx: Generalize disable_cpu_nodes > > imx9: soc: Disable cpu1 for variants that only has one A55 core > > imx: Generalize fixup_thermal_trips > > This one fails to apply to the next branch. > > Please rebase and resend. Based on Tom's next branch, right? Thanks, Peng.
Hi Peng,
On Wed, Sep 18, 2024 at 11:38 PM Peng Fan <peng.fan@nxp.com> wrote:
> Based on Tom's next branch, right?
Correct.
This is the error I get:
git am -3 ~/Downloads/imx9-various-update.patch
Applying: imx9: soc: wait ssar when power on power domain
Applying: imx9: soc: Configure TRDC for M33 TCM access
Applying: imx9: soc: imx9: soc: Align UID endianness with ROM
Applying: imx9: soc: Print UID in big endian format for EL2GO
Applying: imx9: soc: Change FSB directly access to fuse API
Applying: imx9: soc: Change second Ethernet MAC fuse layout
Applying: imx9: soc: Print ELE information
Applying: imx9: soc: Add function to get target voltage mode
Applying: imx9: clock: Update clock init function and sequence
Applying: imx9: soc: Mask the wdog reset in src by default on i.mx9
Applying: imx9: Add 233Mhz DDR PLL frequency
Applying: imx8m: soc: Drop disable_pmu_cpu_nodes
Applying: imx: Generalize disable_cpu_nodes
error: sha1 information is lacking or useless (arch/arm/mach-imx/imx8m/soc.c).
error: could not build fake ancestor
Patch failed at 0013 imx: Generalize disable_cpu_nodes
hint: Use 'git am --show-current-patch=diff' to see the failed patch
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
Several updates to i.MX9 SOC and i.MX93 EVK, the related code has been in NXP downstream for some time and gone through several public releases. Some are directly cherry-picked(with R-b kept), some are modified from downtream. This patchset includes: power domain on fixes TRDC cleanup and update MAC address update i.MX9301/9302 included. runtime detection of voltage mode PMIC update generalize some code for i.MX8M and i.MX9 i.MX93 EVK update and misc. CI passed. Signed-off-by: Peng Fan <peng.fan@nxp.com> --- Changes in v2: - Improve subject to patch 3 - 'EL2GO' -> 'EdgeLock 2GO' in patch 4 commit log - Use HW_CFG1/HW_CFG2 to replace bank2,work[3,4] in patch 5 - Separate patch 6 into two patches, one is MAC update, one is print ELE information - Typo fix in patch 12 - Drop patch 21 "imx93_evk: Enable M.2 VPCIe_3V3 and deassert SD3_nRST", this needs kernel dts update first, then U-Boot could follow that logic. - Link to v1: https://lore.kernel.org/r/20240917-imx9-update-v1-0-4fe8effc937e@nxp.com --- Frank Li (1): imx9: soc: imx9: soc: Align UID endianness with ROM Jacky Bai (1): imx9: soc: Mask the wdog reset in src by default on i.mx9 Peng Fan (12): imx9: soc: wait ssar when power on power domain imx9: soc: Change FSB directly access to fuse API imx9: soc: Print ELE information imx8m: soc: Drop disable_pmu_cpu_nodes imx: Generalize disable_cpu_nodes imx9: soc: Disable cpu1 for variants that only has one A55 core imx: Generalize fixup_thermal_trips imx9: trdc: cleanup code imx9: trdc: introduce trdc_mbc_blk_num imx93_evk: spl: update pmic settings imx93_evk: Remove CONFIG_IMX9_LOW_DRIVE_MODE and ld defconfig imx93_evk: add back Low drive mode ddr timing file Ye Li (7): imx9: soc: Configure TRDC for M33 TCM access imx9: soc: Print UID in big endian format for EL2GO imx9: soc: Change second Ethernet MAC fuse layout imx9: soc: Add function to get target voltage mode imx9: clock: Update clock init function and sequence imx9: Add 233Mhz DDR PLL frequency imx93: Add Low performance parts 9302/9301 support arch/arm/include/asm/arch-imx/cpu.h | 2 + arch/arm/include/asm/arch-imx9/clock.h | 3 +- arch/arm/include/asm/arch-imx9/imx-regs.h | 10 + arch/arm/include/asm/arch-imx9/sys_proto.h | 11 + arch/arm/include/asm/mach-imx/sys_proto.h | 8 +- arch/arm/mach-imx/Makefile | 6 + arch/arm/mach-imx/fdt.c | 129 ++ arch/arm/mach-imx/imx8m/soc.c | 179 +- arch/arm/mach-imx/imx9/Kconfig | 6 +- arch/arm/mach-imx/imx9/clock.c | 40 +- arch/arm/mach-imx/imx9/soc.c | 258 ++- arch/arm/mach-imx/imx9/trdc.c | 175 +- board/freescale/imx93_evk/Makefile | 6 +- board/freescale/imx93_evk/lpddr4x_timing_1866mts.c | 1995 ++++++++++++++++++++ board/freescale/imx93_evk/lpddr4x_timing_ld.c | 1496 --------------- board/freescale/imx93_evk/spl.c | 55 +- board/phytec/phycore_imx93/spl.c | 2 +- configs/imx93_11x11_evk_ld_defconfig | 126 -- drivers/cpu/imx8_cpu.c | 4 + drivers/ddr/imx/phy/ddrphy_utils.c | 4 + include/power/pca9450.h | 2 + 21 files changed, 2582 insertions(+), 1935 deletions(-) --- base-commit: 1630ff26cc960439b5949b80cfc604a2c8aa47dd change-id: 20240916-imx9-update-0ce38f6ccd3d Best regards,