| Message ID | 20190227143213.8963-1-jagan@amarulasolutions.com |
|---|---|
| Headers | show |
| Series | spi: Add Allwinner A31 SPI driver | expand |
On Wed, Feb 27, 2019 at 8:02 PM Jagan Teki <jagan@amarulasolutions.com> wrote: > > This series add support for Allwinner A31 SPI controller driver. > > Fixed and improved conde when compared to previous series[1] > > Changes for v3: > - update commit message for "poll rxfifo" patch > - change SPI_CS argument as SPI_CS(priv, cs) > - keep 'unsigned long' for register set, since using u16 encounter > type-casting issues with writel and readl calls > - change 'unsigned long' to u32 for register bits > - add detailed commit message for 'spi: sun4i: Add CLK support' > - use has_soft_reset and has_burst_ctl driver variant flags for > A31 specific changes > - add allwinner,sun6i-a31-spi compatible support > - add fifo_depth support for A31 > - rename sun4i_spi to spi-sunxi.c > - update spi-sunxi.c Kconfig entry > Changes for v2: > - use fifo_sta instead ctl reg in readl_poll > - use ">=" instead of negotiation in readl_poll condition > - use SPI_REG, SPI_BIT, SPI_CS macro for code improvement > - use compatible check for A31 register enablement > - add allwinner,sun6i-a31-spi compatible > - exclude driver enable patches, since it has SPI kconfig dependencies. > > [1] https://patchwork.ozlabs.org/cover/1041901/ > > Jagan Teki (9): > spi: sun4i: Poll for rxfifo to be filled up > clk: sunxi: Implement SPI clocks, resets > spi: sun4i: Simplify reg writes using set/clrbits_le32 > spi: sun4i: Access registers and bits via enum offsets > spi: sun4i: Support fifo_depth via drvdata > spi: sun4i: Add CLK support > spi: sun4: Add A31 spi controller support > spi: sun4i: Driver cleanup > spi: Rename sun4i_spi.c into spi-sunxi.c Applied to u-boot-spi/master
This series add support for Allwinner A31 SPI controller driver. Fixed and improved conde when compared to previous series[1] Changes for v3: - update commit message for "poll rxfifo" patch - change SPI_CS argument as SPI_CS(priv, cs) - keep 'unsigned long' for register set, since using u16 encounter type-casting issues with writel and readl calls - change 'unsigned long' to u32 for register bits - add detailed commit message for 'spi: sun4i: Add CLK support' - use has_soft_reset and has_burst_ctl driver variant flags for A31 specific changes - add allwinner,sun6i-a31-spi compatible support - add fifo_depth support for A31 - rename sun4i_spi to spi-sunxi.c - update spi-sunxi.c Kconfig entry Changes for v2: - use fifo_sta instead ctl reg in readl_poll - use ">=" instead of negotiation in readl_poll condition - use SPI_REG, SPI_BIT, SPI_CS macro for code improvement - use compatible check for A31 register enablement - add allwinner,sun6i-a31-spi compatible - exclude driver enable patches, since it has SPI kconfig dependencies. [1] https://patchwork.ozlabs.org/cover/1041901/ Jagan Teki (9): spi: sun4i: Poll for rxfifo to be filled up clk: sunxi: Implement SPI clocks, resets spi: sun4i: Simplify reg writes using set/clrbits_le32 spi: sun4i: Access registers and bits via enum offsets spi: sun4i: Support fifo_depth via drvdata spi: sun4i: Add CLK support spi: sun4: Add A31 spi controller support spi: sun4i: Driver cleanup spi: Rename sun4i_spi.c into spi-sunxi.c drivers/clk/sunxi/clk_a10.c | 10 + drivers/clk/sunxi/clk_a10s.c | 7 + drivers/clk/sunxi/clk_a23.c | 7 + drivers/clk/sunxi/clk_a31.c | 13 + drivers/clk/sunxi/clk_a64.c | 7 + drivers/clk/sunxi/clk_a80.c | 13 + drivers/clk/sunxi/clk_a83t.c | 7 + drivers/clk/sunxi/clk_h3.c | 7 + drivers/clk/sunxi/clk_h6.c | 9 + drivers/clk/sunxi/clk_r40.c | 13 + drivers/clk/sunxi/clk_v3s.c | 4 + drivers/spi/Kconfig | 12 +- drivers/spi/Makefile | 2 +- drivers/spi/{sun4i_spi.c => spi-sunxi.c} | 445 ++++++++++++++++------- 14 files changed, 416 insertions(+), 140 deletions(-) rename drivers/spi/{sun4i_spi.c => spi-sunxi.c} (50%)