| Message ID | 20190129055007.17376-1-vigneshr@ti.com |
|---|---|
| Headers | show |
| Series | SF: Migrate to Linux SPI NOR framework | expand |
On Tue, Jan 29, 2019 at 6:49 AM Vignesh R <vigneshr@ti.com> wrote: > > Here is the v3 of SPI NOR migration(github branch at [1]). I have > retained Tested-by from v2 as this is just re split of patches and > minor fixups. So re-testing is not necessary? Regards, Simon > > Travis ci reports all green. > > Change log: > Since v2: > Split sync up patches into smaller versions so that its easier for review. > Address comments by Jagan and Simon Goldschmidt on v2. > Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to > offset against size increase due to new code. > > Since v1: > Remove #ifindef __UBOOT__ > Add back BAR support, but dont enable as default for all platform (see > 10/11 for more details) > Enable SPI_FLASH_TINY on boards where there is SPL size constraint as > seen on travis ci builds. > Drop sf_mtd changes for now as it seems to cause issues. > v1: https://patchwork.ozlabs.org/cover/1012146/ > > Since RFC v2: > Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode > Fix issues in compiling SFDP code > Re organize file names and Makefile to simply spi-nor-tiny inclusion > Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used > RFC v2: https://patchwork.ozlabs.org/cover/1007589/ > > Since RFC v1: > Add lightweight SPI flash stack for boards with SPL size constraints > Provide non DM version of spi-mem > Fix build issues on different platforms as reported by travis-ci on v1 > > RFC v1: https://patchwork.ozlabs.org/cover/1004689/ > > Background: > > U-Boot SPI NOR support (sf layer) is quite outdated as it does not > support 4 byte addressing opcodes, SFDP table parsing and different types of > quad mode enable sequences. Many newer flashes no longer support BANK > registers used by sf layer to a access >16MB space. > Also, many SPI controllers have special MMIO interfaces which provide > accelerated read/write access but require knowledge of flash parameters > to make use of it. Recent spi-mem layer provides a way to support such > flashes but sf layer isn't using that. > This patch series syncs SPI NOR framework from Linux v4.19. It also adds > spi-mem support on top. > So, we gain 4byte addressing support and SFDP support. This makes > migrating to U-Boot MTD framework easier. > > Tested with few Spansion, micron and macronix flashes with TI's dra7xx, > k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, > I would greatly appreciate testing on other platforms. Complete series > with dependencies here[1] > > For clean build on some platforms, depends on CONFIG_SPI_FLASH migration > to defconfigs [2] > > [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 > [2] https://patchwork.ozlabs.org/patch/1007485/ > > Vignesh R (20): > configs: Move CONFIG_SPI_FLASH into defconfigs > bitops: Fix GENMASK definition for Sandbox > spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes > spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size > spi: spi-mem: Claim SPI bus before spi mem access > spi: Add non DM version of SPI_MEM > sh: bitops: add hweight*() macros > mtd: spi: Port SPI NOR framework from Linux > mtd: spi: spi-nor-core: Add SPI MEM support > mtd: spi: spi-nor-core: Add 4 Byte addressing support > mtd: spi: spi-nor-core: Add SFDP support > mtd: spi: spi-nor-core: Add back U-Boot specific features > mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string > mtd: spi: Switch to new SPI NOR framework > mtd: spi: Remove unused files > mtd: spi: Add lightweight SPI flash stack for SPL > spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL > configs: Remove SF_DUAL_FLASH > configs: Don't use SPI_FLASH_BAR as default > MAINTAINERS: Add an entry for SPI NOR > > MAINTAINERS | 9 + > arch/arm/mach-omap2/am33xx/Kconfig | 1 - > arch/sh/include/asm/bitops.h | 4 + > common/spl/Kconfig | 23 +- > configs/alt_defconfig | 1 - > configs/am57xx_evm_defconfig | 1 - > configs/am57xx_hs_evm_defconfig | 1 - > configs/ap121_defconfig | 1 - > configs/ap143_defconfig | 1 - > configs/avnet_ultra96_rev1_defconfig | 1 - > configs/axs101_defconfig | 1 - > configs/axs103_defconfig | 1 - > configs/bg0900_defconfig | 1 - > configs/blanche_defconfig | 1 - > configs/cgtqmx6eval_defconfig | 1 + > configs/chromebit_mickey_defconfig | 1 + > configs/chromebook_jerry_defconfig | 1 + > configs/chromebook_minnie_defconfig | 1 + > configs/cl-som-am57x_defconfig | 1 - > configs/clearfog_defconfig | 1 - > configs/cm_t43_defconfig | 1 - > configs/db-88f6820-amc_defconfig | 1 - > configs/display5_defconfig | 1 - > configs/display5_factory_defconfig | 1 - > configs/dra7xx_evm_defconfig | 1 - > configs/dra7xx_hs_evm_defconfig | 1 - > configs/ds109_defconfig | 1 - > configs/ds414_defconfig | 1 - > configs/evb-rk3036_defconfig | 1 + > configs/evb-rk3128_defconfig | 1 + > configs/evb-rk3288_defconfig | 1 + > configs/evb-rk3328_defconfig | 1 + > configs/evb-rv1108_defconfig | 1 - > configs/fennec-rk3288_defconfig | 1 + > configs/firefly-rk3288_defconfig | 1 + > configs/gose_defconfig | 1 - > configs/helios4_defconfig | 1 - > configs/k2g_evm_defconfig | 1 - > configs/k2g_hs_evm_defconfig | 1 - > configs/koelsch_defconfig | 1 - > configs/kylin-rk3036_defconfig | 1 + > configs/lager_defconfig | 1 - > configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + > configs/ls2080aqds_defconfig | 1 + > configs/ls2080aqds_nand_defconfig | 1 + > configs/ls2080aqds_qspi_defconfig | 1 + > configs/ls2080aqds_sdcard_defconfig | 1 + > configs/maxbcm_defconfig | 1 - > configs/miqi-rk3288_defconfig | 1 + > configs/mt7629_rfb_defconfig | 1 - > configs/mx6sxsabreauto_defconfig | 1 - > configs/mx6sxsabresd_defconfig | 1 - > configs/mx6ul_14x14_evk_defconfig | 1 - > configs/mx6ul_9x9_evk_defconfig | 1 - > configs/mx6ull_14x14_evk_defconfig | 1 - > configs/mx6ull_14x14_evk_plugin_defconfig | 1 - > configs/mx7dsabresd_qspi_defconfig | 1 - > configs/phycore-rk3288_defconfig | 1 + > configs/popmetal-rk3288_defconfig | 1 + > configs/porter_defconfig | 1 - > configs/r8a77970_eagle_defconfig | 1 - > configs/rock2_defconfig | 1 + > configs/rock_defconfig | 1 + > configs/silk_defconfig | 1 - > configs/socfpga_arria5_defconfig | 1 - > configs/socfpga_cyclone5_defconfig | 1 - > configs/socfpga_is1_defconfig | 1 - > configs/socfpga_sockit_defconfig | 1 - > configs/socfpga_socrates_defconfig | 1 - > configs/socfpga_sr1500_defconfig | 1 - > configs/socfpga_stratix10_defconfig | 1 - > configs/stout_defconfig | 1 - > configs/tinker-rk3288_defconfig | 1 + > configs/topic_miami_defconfig | 1 - > configs/topic_miamilite_defconfig | 2 - > configs/topic_miamiplus_defconfig | 2 - > configs/turris_omnia_defconfig | 1 + > configs/vyasa-rk3288_defconfig | 1 + > configs/xilinx_versal_virt_defconfig | 1 - > configs/xilinx_zynqmp_mini_qspi_defconfig | 2 - > configs/xilinx_zynqmp_zc1232_revA_defconfig | 2 - > configs/xilinx_zynqmp_zc1254_revA_defconfig | 2 - > configs/xilinx_zynqmp_zc1275_revA_defconfig | 2 - > configs/xilinx_zynqmp_zc1275_revB_defconfig | 2 - > .../xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 2 - > .../xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 - > .../xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 2 - > configs/xilinx_zynqmp_zcu100_revC_defconfig | 1 - > configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 2 - > configs/xilinx_zynqmp_zcu102_revA_defconfig | 2 - > configs/xilinx_zynqmp_zcu102_revB_defconfig | 2 - > configs/xilinx_zynqmp_zcu104_revA_defconfig | 2 - > configs/xilinx_zynqmp_zcu104_revC_defconfig | 2 - > configs/xilinx_zynqmp_zcu106_revA_defconfig | 2 - > configs/xilinx_zynqmp_zcu111_revA_defconfig | 1 - > configs/zynq_cc108_defconfig | 1 - > configs/zynq_cse_qspi_defconfig | 1 - > configs/zynq_dlc20_rev1_0_defconfig | 1 - > configs/zynq_microzed_defconfig | 1 - > configs/zynq_minized_defconfig | 1 - > configs/zynq_z_turn_defconfig | 1 - > configs/zynq_zc702_defconfig | 1 - > configs/zynq_zc706_defconfig | 1 - > configs/zynq_zc770_xm010_defconfig | 1 - > configs/zynq_zc770_xm013_defconfig | 1 - > configs/zynq_zed_defconfig | 1 - > configs/zynq_zybo_defconfig | 1 - > configs/zynq_zybo_z7_defconfig | 1 - > doc/SPI/README.dual-flash | 92 - > doc/SPI/README.ti_qspi_dra_test | 1 - > drivers/mtd/spi/Kconfig | 16 +- > drivers/mtd/spi/Makefile | 12 +- > drivers/mtd/spi/sandbox.c | 36 +- > drivers/mtd/spi/sf_dataflash.c | 11 +- > drivers/mtd/spi/sf_internal.h | 225 +- > drivers/mtd/spi/sf_probe.c | 33 +- > drivers/mtd/spi/spi-nor-core.c | 2420 +++++++++++++++++ > drivers/mtd/spi/spi-nor-ids.c | 297 ++ > drivers/mtd/spi/spi-nor-tiny.c | 810 ++++++ > drivers/mtd/spi/spi_flash.c | 1337 --------- > drivers/mtd/spi/spi_flash_ids.c | 211 -- > drivers/spi/Kconfig | 9 +- > drivers/spi/Makefile | 1 + > drivers/spi/spi-mem-nodm.c | 105 + > drivers/spi/spi-mem.c | 41 +- > drivers/spi/stm32_qspi.c | 4 +- > include/configs/T102xQDS.h | 1 - > include/configs/T102xRDB.h | 1 - > include/configs/T104xRDB.h | 1 - > include/configs/T208xQDS.h | 1 - > include/configs/T208xRDB.h | 1 - > include/configs/cgtqmx6eval.h | 1 - > include/configs/gw_ventana.h | 1 - > include/configs/km/kmp204x-common.h | 1 - > include/configs/ls1021aiot.h | 1 - > include/configs/ls2080aqds.h | 2 - > include/configs/rk3036_common.h | 1 - > include/configs/rk3128_common.h | 1 - > include/configs/rk3188_common.h | 1 - > include/configs/rk3288_common.h | 1 - > include/configs/rk3328_common.h | 1 - > include/configs/socfpga_stratix10_socdk.h | 1 - > include/configs/turris_omnia.h | 1 - > include/linux/bitops.h | 5 + > include/linux/mtd/cfi.h | 32 + > include/linux/mtd/spi-nor.h | 419 +++ > include/spi_flash.h | 105 +- > 147 files changed, 4313 insertions(+), 2083 deletions(-) > delete mode 100644 doc/SPI/README.dual-flash > create mode 100644 drivers/mtd/spi/spi-nor-core.c > create mode 100644 drivers/mtd/spi/spi-nor-ids.c > create mode 100644 drivers/mtd/spi/spi-nor-tiny.c > delete mode 100644 drivers/mtd/spi/spi_flash.c > delete mode 100644 drivers/mtd/spi/spi_flash_ids.c > create mode 100644 drivers/spi/spi-mem-nodm.c > create mode 100644 include/linux/mtd/cfi.h > create mode 100644 include/linux/mtd/spi-nor.h > > -- > 2.20.1 >
On 29/01/19 1:45 PM, Simon Goldschmidt wrote: > On Tue, Jan 29, 2019 at 6:49 AM Vignesh R <vigneshr@ti.com> wrote: >> >> Here is the v3 of SPI NOR migration(github branch at [1]). I have >> retained Tested-by from v2 as this is just re split of patches and >> minor fixups. > > So re-testing is not necessary? > There is no change in the code as such apart from minor fixup. But any sanity test is welcome! BTW, I have enabled SPI_FLASH_TINY as default like you suggested. > Regards, > Simon > >> >> Travis ci reports all green. >> >> Change log: >> Since v2: >> Split sync up patches into smaller versions so that its easier for review. >> Address comments by Jagan and Simon Goldschmidt on v2. >> Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to >> offset against size increase due to new code. >> >> Since v1: >> Remove #ifindef __UBOOT__ >> Add back BAR support, but dont enable as default for all platform (see >> 10/11 for more details) >> Enable SPI_FLASH_TINY on boards where there is SPL size constraint as >> seen on travis ci builds. >> Drop sf_mtd changes for now as it seems to cause issues. >> v1: https://patchwork.ozlabs.org/cover/1012146/ >> >> Since RFC v2: >> Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode >> Fix issues in compiling SFDP code >> Re organize file names and Makefile to simply spi-nor-tiny inclusion >> Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used >> RFC v2: https://patchwork.ozlabs.org/cover/1007589/ >> >> Since RFC v1: >> Add lightweight SPI flash stack for boards with SPL size constraints >> Provide non DM version of spi-mem >> Fix build issues on different platforms as reported by travis-ci on v1 >> >> RFC v1: https://patchwork.ozlabs.org/cover/1004689/ >> >> Background: >> >> U-Boot SPI NOR support (sf layer) is quite outdated as it does not >> support 4 byte addressing opcodes, SFDP table parsing and different types of >> quad mode enable sequences. Many newer flashes no longer support BANK >> registers used by sf layer to a access >16MB space. >> Also, many SPI controllers have special MMIO interfaces which provide >> accelerated read/write access but require knowledge of flash parameters >> to make use of it. Recent spi-mem layer provides a way to support such >> flashes but sf layer isn't using that. >> This patch series syncs SPI NOR framework from Linux v4.19. It also adds >> spi-mem support on top. >> So, we gain 4byte addressing support and SFDP support. This makes >> migrating to U-Boot MTD framework easier. >> >> Tested with few Spansion, micron and macronix flashes with TI's dra7xx, >> k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, >> I would greatly appreciate testing on other platforms. Complete series >> with dependencies here[1] >> >> For clean build on some platforms, depends on CONFIG_SPI_FLASH migration >> to defconfigs [2] >> >> [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 >> [2] https://patchwork.ozlabs.org/patch/1007485/ >> >> Vignesh R (20): >> configs: Move CONFIG_SPI_FLASH into defconfigs >> bitops: Fix GENMASK definition for Sandbox >> spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes >> spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size >> spi: spi-mem: Claim SPI bus before spi mem access >> spi: Add non DM version of SPI_MEM >> sh: bitops: add hweight*() macros >> mtd: spi: Port SPI NOR framework from Linux >> mtd: spi: spi-nor-core: Add SPI MEM support >> mtd: spi: spi-nor-core: Add 4 Byte addressing support >> mtd: spi: spi-nor-core: Add SFDP support >> mtd: spi: spi-nor-core: Add back U-Boot specific features >> mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string >> mtd: spi: Switch to new SPI NOR framework >> mtd: spi: Remove unused files >> mtd: spi: Add lightweight SPI flash stack for SPL >> spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL >> configs: Remove SF_DUAL_FLASH >> configs: Don't use SPI_FLASH_BAR as default >> MAINTAINERS: Add an entry for SPI NOR >> >> MAINTAINERS | 9 + >> arch/arm/mach-omap2/am33xx/Kconfig | 1 - >> arch/sh/include/asm/bitops.h | 4 + >> common/spl/Kconfig | 23 +- >> configs/alt_defconfig | 1 - >> configs/am57xx_evm_defconfig | 1 - >> configs/am57xx_hs_evm_defconfig | 1 - >> configs/ap121_defconfig | 1 - >> configs/ap143_defconfig | 1 - >> configs/avnet_ultra96_rev1_defconfig | 1 - >> configs/axs101_defconfig | 1 - >> configs/axs103_defconfig | 1 - >> configs/bg0900_defconfig | 1 - >> configs/blanche_defconfig | 1 - >> configs/cgtqmx6eval_defconfig | 1 + >> configs/chromebit_mickey_defconfig | 1 + >> configs/chromebook_jerry_defconfig | 1 + >> configs/chromebook_minnie_defconfig | 1 + >> configs/cl-som-am57x_defconfig | 1 - >> configs/clearfog_defconfig | 1 - >> configs/cm_t43_defconfig | 1 - >> configs/db-88f6820-amc_defconfig | 1 - >> configs/display5_defconfig | 1 - >> configs/display5_factory_defconfig | 1 - >> configs/dra7xx_evm_defconfig | 1 - >> configs/dra7xx_hs_evm_defconfig | 1 - >> configs/ds109_defconfig | 1 - >> configs/ds414_defconfig | 1 - >> configs/evb-rk3036_defconfig | 1 + >> configs/evb-rk3128_defconfig | 1 + >> configs/evb-rk3288_defconfig | 1 + >> configs/evb-rk3328_defconfig | 1 + >> configs/evb-rv1108_defconfig | 1 - >> configs/fennec-rk3288_defconfig | 1 + >> configs/firefly-rk3288_defconfig | 1 + >> configs/gose_defconfig | 1 - >> configs/helios4_defconfig | 1 - >> configs/k2g_evm_defconfig | 1 - >> configs/k2g_hs_evm_defconfig | 1 - >> configs/koelsch_defconfig | 1 - >> configs/kylin-rk3036_defconfig | 1 + >> configs/lager_defconfig | 1 - >> configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + >> configs/ls2080aqds_defconfig | 1 + >> configs/ls2080aqds_nand_defconfig | 1 + >> configs/ls2080aqds_qspi_defconfig | 1 + >> configs/ls2080aqds_sdcard_defconfig | 1 + >> configs/maxbcm_defconfig | 1 - >> configs/miqi-rk3288_defconfig | 1 + >> configs/mt7629_rfb_defconfig | 1 - >> configs/mx6sxsabreauto_defconfig | 1 - >> configs/mx6sxsabresd_defconfig | 1 - >> configs/mx6ul_14x14_evk_defconfig | 1 - >> configs/mx6ul_9x9_evk_defconfig | 1 - >> configs/mx6ull_14x14_evk_defconfig | 1 - >> configs/mx6ull_14x14_evk_plugin_defconfig | 1 - >> configs/mx7dsabresd_qspi_defconfig | 1 - >> configs/phycore-rk3288_defconfig | 1 + >> configs/popmetal-rk3288_defconfig | 1 + >> configs/porter_defconfig | 1 - >> configs/r8a77970_eagle_defconfig | 1 - >> configs/rock2_defconfig | 1 + >> configs/rock_defconfig | 1 + >> configs/silk_defconfig | 1 - >> configs/socfpga_arria5_defconfig | 1 - >> configs/socfpga_cyclone5_defconfig | 1 - >> configs/socfpga_is1_defconfig | 1 - >> configs/socfpga_sockit_defconfig | 1 - >> configs/socfpga_socrates_defconfig | 1 - >> configs/socfpga_sr1500_defconfig | 1 - >> configs/socfpga_stratix10_defconfig | 1 - >> configs/stout_defconfig | 1 - >> configs/tinker-rk3288_defconfig | 1 + >> configs/topic_miami_defconfig | 1 - >> configs/topic_miamilite_defconfig | 2 - >> configs/topic_miamiplus_defconfig | 2 - >> configs/turris_omnia_defconfig | 1 + >> configs/vyasa-rk3288_defconfig | 1 + >> configs/xilinx_versal_virt_defconfig | 1 - >> configs/xilinx_zynqmp_mini_qspi_defconfig | 2 - >> configs/xilinx_zynqmp_zc1232_revA_defconfig | 2 - >> configs/xilinx_zynqmp_zc1254_revA_defconfig | 2 - >> configs/xilinx_zynqmp_zc1275_revA_defconfig | 2 - >> configs/xilinx_zynqmp_zc1275_revB_defconfig | 2 - >> .../xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 2 - >> .../xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 - >> .../xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 2 - >> configs/xilinx_zynqmp_zcu100_revC_defconfig | 1 - >> configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 2 - >> configs/xilinx_zynqmp_zcu102_revA_defconfig | 2 - >> configs/xilinx_zynqmp_zcu102_revB_defconfig | 2 - >> configs/xilinx_zynqmp_zcu104_revA_defconfig | 2 - >> configs/xilinx_zynqmp_zcu104_revC_defconfig | 2 - >> configs/xilinx_zynqmp_zcu106_revA_defconfig | 2 - >> configs/xilinx_zynqmp_zcu111_revA_defconfig | 1 - >> configs/zynq_cc108_defconfig | 1 - >> configs/zynq_cse_qspi_defconfig | 1 - >> configs/zynq_dlc20_rev1_0_defconfig | 1 - >> configs/zynq_microzed_defconfig | 1 - >> configs/zynq_minized_defconfig | 1 - >> configs/zynq_z_turn_defconfig | 1 - >> configs/zynq_zc702_defconfig | 1 - >> configs/zynq_zc706_defconfig | 1 - >> configs/zynq_zc770_xm010_defconfig | 1 - >> configs/zynq_zc770_xm013_defconfig | 1 - >> configs/zynq_zed_defconfig | 1 - >> configs/zynq_zybo_defconfig | 1 - >> configs/zynq_zybo_z7_defconfig | 1 - >> doc/SPI/README.dual-flash | 92 - >> doc/SPI/README.ti_qspi_dra_test | 1 - >> drivers/mtd/spi/Kconfig | 16 +- >> drivers/mtd/spi/Makefile | 12 +- >> drivers/mtd/spi/sandbox.c | 36 +- >> drivers/mtd/spi/sf_dataflash.c | 11 +- >> drivers/mtd/spi/sf_internal.h | 225 +- >> drivers/mtd/spi/sf_probe.c | 33 +- >> drivers/mtd/spi/spi-nor-core.c | 2420 +++++++++++++++++ >> drivers/mtd/spi/spi-nor-ids.c | 297 ++ >> drivers/mtd/spi/spi-nor-tiny.c | 810 ++++++ >> drivers/mtd/spi/spi_flash.c | 1337 --------- >> drivers/mtd/spi/spi_flash_ids.c | 211 -- >> drivers/spi/Kconfig | 9 +- >> drivers/spi/Makefile | 1 + >> drivers/spi/spi-mem-nodm.c | 105 + >> drivers/spi/spi-mem.c | 41 +- >> drivers/spi/stm32_qspi.c | 4 +- >> include/configs/T102xQDS.h | 1 - >> include/configs/T102xRDB.h | 1 - >> include/configs/T104xRDB.h | 1 - >> include/configs/T208xQDS.h | 1 - >> include/configs/T208xRDB.h | 1 - >> include/configs/cgtqmx6eval.h | 1 - >> include/configs/gw_ventana.h | 1 - >> include/configs/km/kmp204x-common.h | 1 - >> include/configs/ls1021aiot.h | 1 - >> include/configs/ls2080aqds.h | 2 - >> include/configs/rk3036_common.h | 1 - >> include/configs/rk3128_common.h | 1 - >> include/configs/rk3188_common.h | 1 - >> include/configs/rk3288_common.h | 1 - >> include/configs/rk3328_common.h | 1 - >> include/configs/socfpga_stratix10_socdk.h | 1 - >> include/configs/turris_omnia.h | 1 - >> include/linux/bitops.h | 5 + >> include/linux/mtd/cfi.h | 32 + >> include/linux/mtd/spi-nor.h | 419 +++ >> include/spi_flash.h | 105 +- >> 147 files changed, 4313 insertions(+), 2083 deletions(-) >> delete mode 100644 doc/SPI/README.dual-flash >> create mode 100644 drivers/mtd/spi/spi-nor-core.c >> create mode 100644 drivers/mtd/spi/spi-nor-ids.c >> create mode 100644 drivers/mtd/spi/spi-nor-tiny.c >> delete mode 100644 drivers/mtd/spi/spi_flash.c >> delete mode 100644 drivers/mtd/spi/spi_flash_ids.c >> create mode 100644 drivers/spi/spi-mem-nodm.c >> create mode 100644 include/linux/mtd/cfi.h >> create mode 100644 include/linux/mtd/spi-nor.h >> >> -- >> 2.20.1 >>
On Tue, Jan 29, 2019 at 12:55 PM Vignesh R <vigneshr@ti.com> wrote: > > > > On 29/01/19 1:45 PM, Simon Goldschmidt wrote: > > On Tue, Jan 29, 2019 at 6:49 AM Vignesh R <vigneshr@ti.com> wrote: > >> > >> Here is the v3 of SPI NOR migration(github branch at [1]). I have > >> retained Tested-by from v2 as this is just re split of patches and > >> minor fixups. > > > > So re-testing is not necessary? > > > > There is no change in the code as such apart from minor fixup. > But any sanity test is welcome! OK, let me re-check that ;-) > BTW, I have enabled SPI_FLASH_TINY as default like you suggested. Yes, I saw that. Probably worth sanity-checking pre/post size on my board then... Regards, Simon > > > > Regards, > > Simon > > > >> > >> Travis ci reports all green. > >> > >> Change log: > >> Since v2: > >> Split sync up patches into smaller versions so that its easier for review. > >> Address comments by Jagan and Simon Goldschmidt on v2. > >> Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to > >> offset against size increase due to new code. > >> > >> Since v1: > >> Remove #ifindef __UBOOT__ > >> Add back BAR support, but dont enable as default for all platform (see > >> 10/11 for more details) > >> Enable SPI_FLASH_TINY on boards where there is SPL size constraint as > >> seen on travis ci builds. > >> Drop sf_mtd changes for now as it seems to cause issues. > >> v1: https://patchwork.ozlabs.org/cover/1012146/ > >> > >> Since RFC v2: > >> Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode > >> Fix issues in compiling SFDP code > >> Re organize file names and Makefile to simply spi-nor-tiny inclusion > >> Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used > >> RFC v2: https://patchwork.ozlabs.org/cover/1007589/ > >> > >> Since RFC v1: > >> Add lightweight SPI flash stack for boards with SPL size constraints > >> Provide non DM version of spi-mem > >> Fix build issues on different platforms as reported by travis-ci on v1 > >> > >> RFC v1: https://patchwork.ozlabs.org/cover/1004689/ > >> > >> Background: > >> > >> U-Boot SPI NOR support (sf layer) is quite outdated as it does not > >> support 4 byte addressing opcodes, SFDP table parsing and different types of > >> quad mode enable sequences. Many newer flashes no longer support BANK > >> registers used by sf layer to a access >16MB space. > >> Also, many SPI controllers have special MMIO interfaces which provide > >> accelerated read/write access but require knowledge of flash parameters > >> to make use of it. Recent spi-mem layer provides a way to support such > >> flashes but sf layer isn't using that. > >> This patch series syncs SPI NOR framework from Linux v4.19. It also adds > >> spi-mem support on top. > >> So, we gain 4byte addressing support and SFDP support. This makes > >> migrating to U-Boot MTD framework easier. > >> > >> Tested with few Spansion, micron and macronix flashes with TI's dra7xx, > >> k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, > >> I would greatly appreciate testing on other platforms. Complete series > >> with dependencies here[1] > >> > >> For clean build on some platforms, depends on CONFIG_SPI_FLASH migration > >> to defconfigs [2] > >> > >> [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 > >> [2] https://patchwork.ozlabs.org/patch/1007485/ > >> > >> Vignesh R (20): > >> configs: Move CONFIG_SPI_FLASH into defconfigs > >> bitops: Fix GENMASK definition for Sandbox > >> spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes > >> spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size > >> spi: spi-mem: Claim SPI bus before spi mem access > >> spi: Add non DM version of SPI_MEM > >> sh: bitops: add hweight*() macros > >> mtd: spi: Port SPI NOR framework from Linux > >> mtd: spi: spi-nor-core: Add SPI MEM support > >> mtd: spi: spi-nor-core: Add 4 Byte addressing support > >> mtd: spi: spi-nor-core: Add SFDP support > >> mtd: spi: spi-nor-core: Add back U-Boot specific features > >> mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string > >> mtd: spi: Switch to new SPI NOR framework > >> mtd: spi: Remove unused files > >> mtd: spi: Add lightweight SPI flash stack for SPL > >> spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL > >> configs: Remove SF_DUAL_FLASH > >> configs: Don't use SPI_FLASH_BAR as default > >> MAINTAINERS: Add an entry for SPI NOR > >> > >> MAINTAINERS | 9 + > >> arch/arm/mach-omap2/am33xx/Kconfig | 1 - > >> arch/sh/include/asm/bitops.h | 4 + > >> common/spl/Kconfig | 23 +- > >> configs/alt_defconfig | 1 - > >> configs/am57xx_evm_defconfig | 1 - > >> configs/am57xx_hs_evm_defconfig | 1 - > >> configs/ap121_defconfig | 1 - > >> configs/ap143_defconfig | 1 - > >> configs/avnet_ultra96_rev1_defconfig | 1 - > >> configs/axs101_defconfig | 1 - > >> configs/axs103_defconfig | 1 - > >> configs/bg0900_defconfig | 1 - > >> configs/blanche_defconfig | 1 - > >> configs/cgtqmx6eval_defconfig | 1 + > >> configs/chromebit_mickey_defconfig | 1 + > >> configs/chromebook_jerry_defconfig | 1 + > >> configs/chromebook_minnie_defconfig | 1 + > >> configs/cl-som-am57x_defconfig | 1 - > >> configs/clearfog_defconfig | 1 - > >> configs/cm_t43_defconfig | 1 - > >> configs/db-88f6820-amc_defconfig | 1 - > >> configs/display5_defconfig | 1 - > >> configs/display5_factory_defconfig | 1 - > >> configs/dra7xx_evm_defconfig | 1 - > >> configs/dra7xx_hs_evm_defconfig | 1 - > >> configs/ds109_defconfig | 1 - > >> configs/ds414_defconfig | 1 - > >> configs/evb-rk3036_defconfig | 1 + > >> configs/evb-rk3128_defconfig | 1 + > >> configs/evb-rk3288_defconfig | 1 + > >> configs/evb-rk3328_defconfig | 1 + > >> configs/evb-rv1108_defconfig | 1 - > >> configs/fennec-rk3288_defconfig | 1 + > >> configs/firefly-rk3288_defconfig | 1 + > >> configs/gose_defconfig | 1 - > >> configs/helios4_defconfig | 1 - > >> configs/k2g_evm_defconfig | 1 - > >> configs/k2g_hs_evm_defconfig | 1 - > >> configs/koelsch_defconfig | 1 - > >> configs/kylin-rk3036_defconfig | 1 + > >> configs/lager_defconfig | 1 - > >> configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + > >> configs/ls2080aqds_defconfig | 1 + > >> configs/ls2080aqds_nand_defconfig | 1 + > >> configs/ls2080aqds_qspi_defconfig | 1 + > >> configs/ls2080aqds_sdcard_defconfig | 1 + > >> configs/maxbcm_defconfig | 1 - > >> configs/miqi-rk3288_defconfig | 1 + > >> configs/mt7629_rfb_defconfig | 1 - > >> configs/mx6sxsabreauto_defconfig | 1 - > >> configs/mx6sxsabresd_defconfig | 1 - > >> configs/mx6ul_14x14_evk_defconfig | 1 - > >> configs/mx6ul_9x9_evk_defconfig | 1 - > >> configs/mx6ull_14x14_evk_defconfig | 1 - > >> configs/mx6ull_14x14_evk_plugin_defconfig | 1 - > >> configs/mx7dsabresd_qspi_defconfig | 1 - > >> configs/phycore-rk3288_defconfig | 1 + > >> configs/popmetal-rk3288_defconfig | 1 + > >> configs/porter_defconfig | 1 - > >> configs/r8a77970_eagle_defconfig | 1 - > >> configs/rock2_defconfig | 1 + > >> configs/rock_defconfig | 1 + > >> configs/silk_defconfig | 1 - > >> configs/socfpga_arria5_defconfig | 1 - > >> configs/socfpga_cyclone5_defconfig | 1 - > >> configs/socfpga_is1_defconfig | 1 - > >> configs/socfpga_sockit_defconfig | 1 - > >> configs/socfpga_socrates_defconfig | 1 - > >> configs/socfpga_sr1500_defconfig | 1 - > >> configs/socfpga_stratix10_defconfig | 1 - > >> configs/stout_defconfig | 1 - > >> configs/tinker-rk3288_defconfig | 1 + > >> configs/topic_miami_defconfig | 1 - > >> configs/topic_miamilite_defconfig | 2 - > >> configs/topic_miamiplus_defconfig | 2 - > >> configs/turris_omnia_defconfig | 1 + > >> configs/vyasa-rk3288_defconfig | 1 + > >> configs/xilinx_versal_virt_defconfig | 1 - > >> configs/xilinx_zynqmp_mini_qspi_defconfig | 2 - > >> configs/xilinx_zynqmp_zc1232_revA_defconfig | 2 - > >> configs/xilinx_zynqmp_zc1254_revA_defconfig | 2 - > >> configs/xilinx_zynqmp_zc1275_revA_defconfig | 2 - > >> configs/xilinx_zynqmp_zc1275_revB_defconfig | 2 - > >> .../xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 2 - > >> .../xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 - > >> .../xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 2 - > >> configs/xilinx_zynqmp_zcu100_revC_defconfig | 1 - > >> configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 2 - > >> configs/xilinx_zynqmp_zcu102_revA_defconfig | 2 - > >> configs/xilinx_zynqmp_zcu102_revB_defconfig | 2 - > >> configs/xilinx_zynqmp_zcu104_revA_defconfig | 2 - > >> configs/xilinx_zynqmp_zcu104_revC_defconfig | 2 - > >> configs/xilinx_zynqmp_zcu106_revA_defconfig | 2 - > >> configs/xilinx_zynqmp_zcu111_revA_defconfig | 1 - > >> configs/zynq_cc108_defconfig | 1 - > >> configs/zynq_cse_qspi_defconfig | 1 - > >> configs/zynq_dlc20_rev1_0_defconfig | 1 - > >> configs/zynq_microzed_defconfig | 1 - > >> configs/zynq_minized_defconfig | 1 - > >> configs/zynq_z_turn_defconfig | 1 - > >> configs/zynq_zc702_defconfig | 1 - > >> configs/zynq_zc706_defconfig | 1 - > >> configs/zynq_zc770_xm010_defconfig | 1 - > >> configs/zynq_zc770_xm013_defconfig | 1 - > >> configs/zynq_zed_defconfig | 1 - > >> configs/zynq_zybo_defconfig | 1 - > >> configs/zynq_zybo_z7_defconfig | 1 - > >> doc/SPI/README.dual-flash | 92 - > >> doc/SPI/README.ti_qspi_dra_test | 1 - > >> drivers/mtd/spi/Kconfig | 16 +- > >> drivers/mtd/spi/Makefile | 12 +- > >> drivers/mtd/spi/sandbox.c | 36 +- > >> drivers/mtd/spi/sf_dataflash.c | 11 +- > >> drivers/mtd/spi/sf_internal.h | 225 +- > >> drivers/mtd/spi/sf_probe.c | 33 +- > >> drivers/mtd/spi/spi-nor-core.c | 2420 +++++++++++++++++ > >> drivers/mtd/spi/spi-nor-ids.c | 297 ++ > >> drivers/mtd/spi/spi-nor-tiny.c | 810 ++++++ > >> drivers/mtd/spi/spi_flash.c | 1337 --------- > >> drivers/mtd/spi/spi_flash_ids.c | 211 -- > >> drivers/spi/Kconfig | 9 +- > >> drivers/spi/Makefile | 1 + > >> drivers/spi/spi-mem-nodm.c | 105 + > >> drivers/spi/spi-mem.c | 41 +- > >> drivers/spi/stm32_qspi.c | 4 +- > >> include/configs/T102xQDS.h | 1 - > >> include/configs/T102xRDB.h | 1 - > >> include/configs/T104xRDB.h | 1 - > >> include/configs/T208xQDS.h | 1 - > >> include/configs/T208xRDB.h | 1 - > >> include/configs/cgtqmx6eval.h | 1 - > >> include/configs/gw_ventana.h | 1 - > >> include/configs/km/kmp204x-common.h | 1 - > >> include/configs/ls1021aiot.h | 1 - > >> include/configs/ls2080aqds.h | 2 - > >> include/configs/rk3036_common.h | 1 - > >> include/configs/rk3128_common.h | 1 - > >> include/configs/rk3188_common.h | 1 - > >> include/configs/rk3288_common.h | 1 - > >> include/configs/rk3328_common.h | 1 - > >> include/configs/socfpga_stratix10_socdk.h | 1 - > >> include/configs/turris_omnia.h | 1 - > >> include/linux/bitops.h | 5 + > >> include/linux/mtd/cfi.h | 32 + > >> include/linux/mtd/spi-nor.h | 419 +++ > >> include/spi_flash.h | 105 +- > >> 147 files changed, 4313 insertions(+), 2083 deletions(-) > >> delete mode 100644 doc/SPI/README.dual-flash > >> create mode 100644 drivers/mtd/spi/spi-nor-core.c > >> create mode 100644 drivers/mtd/spi/spi-nor-ids.c > >> create mode 100644 drivers/mtd/spi/spi-nor-tiny.c > >> delete mode 100644 drivers/mtd/spi/spi_flash.c > >> delete mode 100644 drivers/mtd/spi/spi_flash_ids.c > >> create mode 100644 drivers/spi/spi-mem-nodm.c > >> create mode 100644 include/linux/mtd/cfi.h > >> create mode 100644 include/linux/mtd/spi-nor.h > >> > >> -- > >> 2.20.1 > >> > > -- > Regards > Vignesh
On Tue, Jan 29, 2019 at 11:19:47AM +0530, Vignesh R wrote: > Here is the v3 of SPI NOR migration(github branch at [1]). I have > retained Tested-by from v2 as this is just re split of patches and > minor fixups. > > Travis ci reports all green. > > Change log: > Since v2: > Split sync up patches into smaller versions so that its easier for review. > Address comments by Jagan and Simon Goldschmidt on v2. > Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to > offset against size increase due to new code. > > Since v1: > Remove #ifindef __UBOOT__ > Add back BAR support, but dont enable as default for all platform (see > 10/11 for more details) > Enable SPI_FLASH_TINY on boards where there is SPL size constraint as > seen on travis ci builds. > Drop sf_mtd changes for now as it seems to cause issues. > v1: https://patchwork.ozlabs.org/cover/1012146/ > > Since RFC v2: > Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode > Fix issues in compiling SFDP code > Re organize file names and Makefile to simply spi-nor-tiny inclusion > Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used > RFC v2: https://patchwork.ozlabs.org/cover/1007589/ > > Since RFC v1: > Add lightweight SPI flash stack for boards with SPL size constraints > Provide non DM version of spi-mem > Fix build issues on different platforms as reported by travis-ci on v1 > > RFC v1: https://patchwork.ozlabs.org/cover/1004689/ > > Background: > > U-Boot SPI NOR support (sf layer) is quite outdated as it does not > support 4 byte addressing opcodes, SFDP table parsing and different types of > quad mode enable sequences. Many newer flashes no longer support BANK > registers used by sf layer to a access >16MB space. > Also, many SPI controllers have special MMIO interfaces which provide > accelerated read/write access but require knowledge of flash parameters > to make use of it. Recent spi-mem layer provides a way to support such > flashes but sf layer isn't using that. > This patch series syncs SPI NOR framework from Linux v4.19. It also adds > spi-mem support on top. > So, we gain 4byte addressing support and SFDP support. This makes > migrating to U-Boot MTD framework easier. > > Tested with few Spansion, micron and macronix flashes with TI's dra7xx, > k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, > I would greatly appreciate testing on other platforms. Complete series > with dependencies here[1] > > For clean build on some platforms, depends on CONFIG_SPI_FLASH migration > to defconfigs [2] > > [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 > [2] https://patchwork.ozlabs.org/patch/1007485/ Note that while I should have done -rc1 yesterday (and I'll email about that on its own shortly), to be clear and for the record, barring further comments that cannot be addressed in follow-up patches, I really want to see this merged. Thanks again all!
On Tue, Jan 29, 2019 at 11:19 AM Vignesh R <vigneshr@ti.com> wrote: > > Here is the v3 of SPI NOR migration(github branch at [1]). I have > retained Tested-by from v2 as this is just re split of patches and > minor fixups. > > Travis ci reports all green. > > Change log: > Since v2: > Split sync up patches into smaller versions so that its easier for review. > Address comments by Jagan and Simon Goldschmidt on v2. > Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to > offset against size increase due to new code. > > Since v1: > Remove #ifindef __UBOOT__ > Add back BAR support, but dont enable as default for all platform (see > 10/11 for more details) > Enable SPI_FLASH_TINY on boards where there is SPL size constraint as > seen on travis ci builds. > Drop sf_mtd changes for now as it seems to cause issues. > v1: https://patchwork.ozlabs.org/cover/1012146/ > > Since RFC v2: > Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode > Fix issues in compiling SFDP code > Re organize file names and Makefile to simply spi-nor-tiny inclusion > Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used > RFC v2: https://patchwork.ozlabs.org/cover/1007589/ > > Since RFC v1: > Add lightweight SPI flash stack for boards with SPL size constraints > Provide non DM version of spi-mem > Fix build issues on different platforms as reported by travis-ci on v1 > > RFC v1: https://patchwork.ozlabs.org/cover/1004689/ > > Background: > > U-Boot SPI NOR support (sf layer) is quite outdated as it does not > support 4 byte addressing opcodes, SFDP table parsing and different types of > quad mode enable sequences. Many newer flashes no longer support BANK > registers used by sf layer to a access >16MB space. > Also, many SPI controllers have special MMIO interfaces which provide > accelerated read/write access but require knowledge of flash parameters > to make use of it. Recent spi-mem layer provides a way to support such > flashes but sf layer isn't using that. > This patch series syncs SPI NOR framework from Linux v4.19. It also adds > spi-mem support on top. > So, we gain 4byte addressing support and SFDP support. This makes > migrating to U-Boot MTD framework easier. > > Tested with few Spansion, micron and macronix flashes with TI's dra7xx, > k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, > I would greatly appreciate testing on other platforms. Complete series > with dependencies here[1] > > For clean build on some platforms, depends on CONFIG_SPI_FLASH migration > to defconfigs [2] > > [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 > [2] https://patchwork.ozlabs.org/patch/1007485/ > > Vignesh R (20): > configs: Move CONFIG_SPI_FLASH into defconfigs > bitops: Fix GENMASK definition for Sandbox > spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes > spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size > spi: spi-mem: Claim SPI bus before spi mem access > spi: Add non DM version of SPI_MEM > sh: bitops: add hweight*() macros > mtd: spi: Port SPI NOR framework from Linux > mtd: spi: spi-nor-core: Add SPI MEM support > mtd: spi: spi-nor-core: Add 4 Byte addressing support > mtd: spi: spi-nor-core: Add SFDP support > mtd: spi: spi-nor-core: Add back U-Boot specific features > mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string > mtd: spi: Switch to new SPI NOR framework > mtd: spi: Remove unused files > mtd: spi: Add lightweight SPI flash stack for SPL > spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL > configs: Remove SF_DUAL_FLASH > configs: Don't use SPI_FLASH_BAR as default > MAINTAINERS: Add an entry for SPI NOR Except 16/20 and 19/20, all look fine to me. Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
On Thu, Jan 31, 2019 at 08:10:53PM +0530, Jagan Teki wrote: > On Tue, Jan 29, 2019 at 11:19 AM Vignesh R <vigneshr@ti.com> wrote: > > > > Here is the v3 of SPI NOR migration(github branch at [1]). I have > > retained Tested-by from v2 as this is just re split of patches and > > minor fixups. > > > > Travis ci reports all green. > > > > Change log: > > Since v2: > > Split sync up patches into smaller versions so that its easier for review. > > Address comments by Jagan and Simon Goldschmidt on v2. > > Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to > > offset against size increase due to new code. > > > > Since v1: > > Remove #ifindef __UBOOT__ > > Add back BAR support, but dont enable as default for all platform (see > > 10/11 for more details) > > Enable SPI_FLASH_TINY on boards where there is SPL size constraint as > > seen on travis ci builds. > > Drop sf_mtd changes for now as it seems to cause issues. > > v1: https://patchwork.ozlabs.org/cover/1012146/ > > > > Since RFC v2: > > Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode > > Fix issues in compiling SFDP code > > Re organize file names and Makefile to simply spi-nor-tiny inclusion > > Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used > > RFC v2: https://patchwork.ozlabs.org/cover/1007589/ > > > > Since RFC v1: > > Add lightweight SPI flash stack for boards with SPL size constraints > > Provide non DM version of spi-mem > > Fix build issues on different platforms as reported by travis-ci on v1 > > > > RFC v1: https://patchwork.ozlabs.org/cover/1004689/ > > > > Background: > > > > U-Boot SPI NOR support (sf layer) is quite outdated as it does not > > support 4 byte addressing opcodes, SFDP table parsing and different types of > > quad mode enable sequences. Many newer flashes no longer support BANK > > registers used by sf layer to a access >16MB space. > > Also, many SPI controllers have special MMIO interfaces which provide > > accelerated read/write access but require knowledge of flash parameters > > to make use of it. Recent spi-mem layer provides a way to support such > > flashes but sf layer isn't using that. > > This patch series syncs SPI NOR framework from Linux v4.19. It also adds > > spi-mem support on top. > > So, we gain 4byte addressing support and SFDP support. This makes > > migrating to U-Boot MTD framework easier. > > > > Tested with few Spansion, micron and macronix flashes with TI's dra7xx, > > k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, > > I would greatly appreciate testing on other platforms. Complete series > > with dependencies here[1] > > > > For clean build on some platforms, depends on CONFIG_SPI_FLASH migration > > to defconfigs [2] > > > > [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 > > [2] https://patchwork.ozlabs.org/patch/1007485/ > > > > Vignesh R (20): > > configs: Move CONFIG_SPI_FLASH into defconfigs > > bitops: Fix GENMASK definition for Sandbox > > spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes > > spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size > > spi: spi-mem: Claim SPI bus before spi mem access > > spi: Add non DM version of SPI_MEM > > sh: bitops: add hweight*() macros > > mtd: spi: Port SPI NOR framework from Linux > > mtd: spi: spi-nor-core: Add SPI MEM support > > mtd: spi: spi-nor-core: Add 4 Byte addressing support > > mtd: spi: spi-nor-core: Add SFDP support > > mtd: spi: spi-nor-core: Add back U-Boot specific features > > mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string > > mtd: spi: Switch to new SPI NOR framework > > mtd: spi: Remove unused files > > mtd: spi: Add lightweight SPI flash stack for SPL > > spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL > > configs: Remove SF_DUAL_FLASH > > configs: Don't use SPI_FLASH_BAR as default > > MAINTAINERS: Add an entry for SPI NOR > > Except 16/20 and 19/20, all look fine to me. > > Reviewed-by: Jagan Teki <jagan@openedev.com> > Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed And based on the Xilinx folks reply to 19/20, is 16/20 something we can deal with as a follow-up? Thanks!
On Thu, Jan 31, 2019 at 8:12 PM Tom Rini <trini@konsulko.com> wrote: > > On Thu, Jan 31, 2019 at 08:10:53PM +0530, Jagan Teki wrote: > > On Tue, Jan 29, 2019 at 11:19 AM Vignesh R <vigneshr@ti.com> wrote: > > > > > > Here is the v3 of SPI NOR migration(github branch at [1]). I have > > > retained Tested-by from v2 as this is just re split of patches and > > > minor fixups. > > > > > > Travis ci reports all green. > > > > > > Change log: > > > Since v2: > > > Split sync up patches into smaller versions so that its easier for review. > > > Address comments by Jagan and Simon Goldschmidt on v2. > > > Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to > > > offset against size increase due to new code. > > > > > > Since v1: > > > Remove #ifindef __UBOOT__ > > > Add back BAR support, but dont enable as default for all platform (see > > > 10/11 for more details) > > > Enable SPI_FLASH_TINY on boards where there is SPL size constraint as > > > seen on travis ci builds. > > > Drop sf_mtd changes for now as it seems to cause issues. > > > v1: https://patchwork.ozlabs.org/cover/1012146/ > > > > > > Since RFC v2: > > > Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode > > > Fix issues in compiling SFDP code > > > Re organize file names and Makefile to simply spi-nor-tiny inclusion > > > Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used > > > RFC v2: https://patchwork.ozlabs.org/cover/1007589/ > > > > > > Since RFC v1: > > > Add lightweight SPI flash stack for boards with SPL size constraints > > > Provide non DM version of spi-mem > > > Fix build issues on different platforms as reported by travis-ci on v1 > > > > > > RFC v1: https://patchwork.ozlabs.org/cover/1004689/ > > > > > > Background: > > > > > > U-Boot SPI NOR support (sf layer) is quite outdated as it does not > > > support 4 byte addressing opcodes, SFDP table parsing and different types of > > > quad mode enable sequences. Many newer flashes no longer support BANK > > > registers used by sf layer to a access >16MB space. > > > Also, many SPI controllers have special MMIO interfaces which provide > > > accelerated read/write access but require knowledge of flash parameters > > > to make use of it. Recent spi-mem layer provides a way to support such > > > flashes but sf layer isn't using that. > > > This patch series syncs SPI NOR framework from Linux v4.19. It also adds > > > spi-mem support on top. > > > So, we gain 4byte addressing support and SFDP support. This makes > > > migrating to U-Boot MTD framework easier. > > > > > > Tested with few Spansion, micron and macronix flashes with TI's dra7xx, > > > k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, > > > I would greatly appreciate testing on other platforms. Complete series > > > with dependencies here[1] > > > > > > For clean build on some platforms, depends on CONFIG_SPI_FLASH migration > > > to defconfigs [2] > > > > > > [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 > > > [2] https://patchwork.ozlabs.org/patch/1007485/ > > > > > > Vignesh R (20): > > > configs: Move CONFIG_SPI_FLASH into defconfigs > > > bitops: Fix GENMASK definition for Sandbox > > > spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes > > > spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size > > > spi: spi-mem: Claim SPI bus before spi mem access > > > spi: Add non DM version of SPI_MEM > > > sh: bitops: add hweight*() macros > > > mtd: spi: Port SPI NOR framework from Linux > > > mtd: spi: spi-nor-core: Add SPI MEM support > > > mtd: spi: spi-nor-core: Add 4 Byte addressing support > > > mtd: spi: spi-nor-core: Add SFDP support > > > mtd: spi: spi-nor-core: Add back U-Boot specific features > > > mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string > > > mtd: spi: Switch to new SPI NOR framework > > > mtd: spi: Remove unused files > > > mtd: spi: Add lightweight SPI flash stack for SPL > > > spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL > > > configs: Remove SF_DUAL_FLASH > > > configs: Don't use SPI_FLASH_BAR as default > > > MAINTAINERS: Add an entry for SPI NOR > > > > Except 16/20 and 19/20, all look fine to me. > > > > Reviewed-by: Jagan Teki <jagan@openedev.com> > > Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed > > And based on the Xilinx folks reply to 19/20, is 16/20 something we can > deal with as a follow-up? Thanks! 19/20, can (If some don't believe me) and 16/20 can be fixed here.
On Thu, Jan 31, 2019 at 3:43 PM Tom Rini <trini@konsulko.com> wrote: > > On Thu, Jan 31, 2019 at 08:10:53PM +0530, Jagan Teki wrote: > > On Tue, Jan 29, 2019 at 11:19 AM Vignesh R <vigneshr@ti.com> wrote: > > > > > > Here is the v3 of SPI NOR migration(github branch at [1]). I have > > > retained Tested-by from v2 as this is just re split of patches and > > > minor fixups. > > > > > > Travis ci reports all green. > > > > > > Change log: > > > Since v2: > > > Split sync up patches into smaller versions so that its easier for review. > > > Address comments by Jagan and Simon Goldschmidt on v2. > > > Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to > > > offset against size increase due to new code. > > > > > > Since v1: > > > Remove #ifindef __UBOOT__ > > > Add back BAR support, but dont enable as default for all platform (see > > > 10/11 for more details) > > > Enable SPI_FLASH_TINY on boards where there is SPL size constraint as > > > seen on travis ci builds. > > > Drop sf_mtd changes for now as it seems to cause issues. > > > v1: https://patchwork.ozlabs.org/cover/1012146/ > > > > > > Since RFC v2: > > > Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode > > > Fix issues in compiling SFDP code > > > Re organize file names and Makefile to simply spi-nor-tiny inclusion > > > Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used > > > RFC v2: https://patchwork.ozlabs.org/cover/1007589/ > > > > > > Since RFC v1: > > > Add lightweight SPI flash stack for boards with SPL size constraints > > > Provide non DM version of spi-mem > > > Fix build issues on different platforms as reported by travis-ci on v1 > > > > > > RFC v1: https://patchwork.ozlabs.org/cover/1004689/ > > > > > > Background: > > > > > > U-Boot SPI NOR support (sf layer) is quite outdated as it does not > > > support 4 byte addressing opcodes, SFDP table parsing and different types of > > > quad mode enable sequences. Many newer flashes no longer support BANK > > > registers used by sf layer to a access >16MB space. > > > Also, many SPI controllers have special MMIO interfaces which provide > > > accelerated read/write access but require knowledge of flash parameters > > > to make use of it. Recent spi-mem layer provides a way to support such > > > flashes but sf layer isn't using that. > > > This patch series syncs SPI NOR framework from Linux v4.19. It also adds > > > spi-mem support on top. > > > So, we gain 4byte addressing support and SFDP support. This makes > > > migrating to U-Boot MTD framework easier. > > > > > > Tested with few Spansion, micron and macronix flashes with TI's dra7xx, > > > k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, > > > I would greatly appreciate testing on other platforms. Complete series > > > with dependencies here[1] > > > > > > For clean build on some platforms, depends on CONFIG_SPI_FLASH migration > > > to defconfigs [2] > > > > > > [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 > > > [2] https://patchwork.ozlabs.org/patch/1007485/ > > > > > > Vignesh R (20): > > > configs: Move CONFIG_SPI_FLASH into defconfigs > > > bitops: Fix GENMASK definition for Sandbox > > > spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes > > > spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size > > > spi: spi-mem: Claim SPI bus before spi mem access > > > spi: Add non DM version of SPI_MEM > > > sh: bitops: add hweight*() macros > > > mtd: spi: Port SPI NOR framework from Linux > > > mtd: spi: spi-nor-core: Add SPI MEM support > > > mtd: spi: spi-nor-core: Add 4 Byte addressing support > > > mtd: spi: spi-nor-core: Add SFDP support > > > mtd: spi: spi-nor-core: Add back U-Boot specific features > > > mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string > > > mtd: spi: Switch to new SPI NOR framework > > > mtd: spi: Remove unused files > > > mtd: spi: Add lightweight SPI flash stack for SPL > > > spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL > > > configs: Remove SF_DUAL_FLASH > > > configs: Don't use SPI_FLASH_BAR as default > > > MAINTAINERS: Add an entry for SPI NOR > > > > Except 16/20 and 19/20, all look fine to me. > > > > Reviewed-by: Jagan Teki <jagan@openedev.com> > > Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed > > And based on the Xilinx folks reply to 19/20, is 16/20 something we can > deal with as a follow-up? Thanks! Going without 16/20 will increase the footprint in SPL. Given the limitation of size checks discussed recently, I don't think that would be a good idea. Regards, Simon
On Thu, Jan 31, 2019 at 8:18 PM Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> wrote: > > On Thu, Jan 31, 2019 at 3:43 PM Tom Rini <trini@konsulko.com> wrote: > > > > On Thu, Jan 31, 2019 at 08:10:53PM +0530, Jagan Teki wrote: > > > On Tue, Jan 29, 2019 at 11:19 AM Vignesh R <vigneshr@ti.com> wrote: > > > > > > > > Here is the v3 of SPI NOR migration(github branch at [1]). I have > > > > retained Tested-by from v2 as this is just re split of patches and > > > > minor fixups. > > > > > > > > Travis ci reports all green. > > > > > > > > Change log: > > > > Since v2: > > > > Split sync up patches into smaller versions so that its easier for review. > > > > Address comments by Jagan and Simon Goldschmidt on v2. > > > > Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to > > > > offset against size increase due to new code. > > > > > > > > Since v1: > > > > Remove #ifindef __UBOOT__ > > > > Add back BAR support, but dont enable as default for all platform (see > > > > 10/11 for more details) > > > > Enable SPI_FLASH_TINY on boards where there is SPL size constraint as > > > > seen on travis ci builds. > > > > Drop sf_mtd changes for now as it seems to cause issues. > > > > v1: https://patchwork.ozlabs.org/cover/1012146/ > > > > > > > > Since RFC v2: > > > > Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode > > > > Fix issues in compiling SFDP code > > > > Re organize file names and Makefile to simply spi-nor-tiny inclusion > > > > Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used > > > > RFC v2: https://patchwork.ozlabs.org/cover/1007589/ > > > > > > > > Since RFC v1: > > > > Add lightweight SPI flash stack for boards with SPL size constraints > > > > Provide non DM version of spi-mem > > > > Fix build issues on different platforms as reported by travis-ci on v1 > > > > > > > > RFC v1: https://patchwork.ozlabs.org/cover/1004689/ > > > > > > > > Background: > > > > > > > > U-Boot SPI NOR support (sf layer) is quite outdated as it does not > > > > support 4 byte addressing opcodes, SFDP table parsing and different types of > > > > quad mode enable sequences. Many newer flashes no longer support BANK > > > > registers used by sf layer to a access >16MB space. > > > > Also, many SPI controllers have special MMIO interfaces which provide > > > > accelerated read/write access but require knowledge of flash parameters > > > > to make use of it. Recent spi-mem layer provides a way to support such > > > > flashes but sf layer isn't using that. > > > > This patch series syncs SPI NOR framework from Linux v4.19. It also adds > > > > spi-mem support on top. > > > > So, we gain 4byte addressing support and SFDP support. This makes > > > > migrating to U-Boot MTD framework easier. > > > > > > > > Tested with few Spansion, micron and macronix flashes with TI's dra7xx, > > > > k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, > > > > I would greatly appreciate testing on other platforms. Complete series > > > > with dependencies here[1] > > > > > > > > For clean build on some platforms, depends on CONFIG_SPI_FLASH migration > > > > to defconfigs [2] > > > > > > > > [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 > > > > [2] https://patchwork.ozlabs.org/patch/1007485/ > > > > > > > > Vignesh R (20): > > > > configs: Move CONFIG_SPI_FLASH into defconfigs > > > > bitops: Fix GENMASK definition for Sandbox > > > > spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes > > > > spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size > > > > spi: spi-mem: Claim SPI bus before spi mem access > > > > spi: Add non DM version of SPI_MEM > > > > sh: bitops: add hweight*() macros > > > > mtd: spi: Port SPI NOR framework from Linux > > > > mtd: spi: spi-nor-core: Add SPI MEM support > > > > mtd: spi: spi-nor-core: Add 4 Byte addressing support > > > > mtd: spi: spi-nor-core: Add SFDP support > > > > mtd: spi: spi-nor-core: Add back U-Boot specific features > > > > mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string > > > > mtd: spi: Switch to new SPI NOR framework > > > > mtd: spi: Remove unused files > > > > mtd: spi: Add lightweight SPI flash stack for SPL > > > > spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL > > > > configs: Remove SF_DUAL_FLASH > > > > configs: Don't use SPI_FLASH_BAR as default > > > > MAINTAINERS: Add an entry for SPI NOR > > > > > > Except 16/20 and 19/20, all look fine to me. > > > > > > Reviewed-by: Jagan Teki <jagan@openedev.com> > > > Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed > > > > And based on the Xilinx folks reply to 19/20, is 16/20 something we can > > deal with as a follow-up? Thanks! > > Going without 16/20 will increase the footprint in SPL. Given the limitation > of size checks discussed recently, I don't think that would be a good idea. Please read the my comments again, I won't oppose the change.
On Thu, Jan 31, 2019 at 08:21:29PM +0530, Jagan Teki wrote: > On Thu, Jan 31, 2019 at 8:18 PM Simon Goldschmidt > <simon.k.r.goldschmidt@gmail.com> wrote: > > > > On Thu, Jan 31, 2019 at 3:43 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > On Thu, Jan 31, 2019 at 08:10:53PM +0530, Jagan Teki wrote: > > > > On Tue, Jan 29, 2019 at 11:19 AM Vignesh R <vigneshr@ti.com> wrote: > > > > > > > > > > Here is the v3 of SPI NOR migration(github branch at [1]). I have > > > > > retained Tested-by from v2 as this is just re split of patches and > > > > > minor fixups. > > > > > > > > > > Travis ci reports all green. > > > > > > > > > > Change log: > > > > > Since v2: > > > > > Split sync up patches into smaller versions so that its easier for review. > > > > > Address comments by Jagan and Simon Goldschmidt on v2. > > > > > Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to > > > > > offset against size increase due to new code. > > > > > > > > > > Since v1: > > > > > Remove #ifindef __UBOOT__ > > > > > Add back BAR support, but dont enable as default for all platform (see > > > > > 10/11 for more details) > > > > > Enable SPI_FLASH_TINY on boards where there is SPL size constraint as > > > > > seen on travis ci builds. > > > > > Drop sf_mtd changes for now as it seems to cause issues. > > > > > v1: https://patchwork.ozlabs.org/cover/1012146/ > > > > > > > > > > Since RFC v2: > > > > > Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode > > > > > Fix issues in compiling SFDP code > > > > > Re organize file names and Makefile to simply spi-nor-tiny inclusion > > > > > Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used > > > > > RFC v2: https://patchwork.ozlabs.org/cover/1007589/ > > > > > > > > > > Since RFC v1: > > > > > Add lightweight SPI flash stack for boards with SPL size constraints > > > > > Provide non DM version of spi-mem > > > > > Fix build issues on different platforms as reported by travis-ci on v1 > > > > > > > > > > RFC v1: https://patchwork.ozlabs.org/cover/1004689/ > > > > > > > > > > Background: > > > > > > > > > > U-Boot SPI NOR support (sf layer) is quite outdated as it does not > > > > > support 4 byte addressing opcodes, SFDP table parsing and different types of > > > > > quad mode enable sequences. Many newer flashes no longer support BANK > > > > > registers used by sf layer to a access >16MB space. > > > > > Also, many SPI controllers have special MMIO interfaces which provide > > > > > accelerated read/write access but require knowledge of flash parameters > > > > > to make use of it. Recent spi-mem layer provides a way to support such > > > > > flashes but sf layer isn't using that. > > > > > This patch series syncs SPI NOR framework from Linux v4.19. It also adds > > > > > spi-mem support on top. > > > > > So, we gain 4byte addressing support and SFDP support. This makes > > > > > migrating to U-Boot MTD framework easier. > > > > > > > > > > Tested with few Spansion, micron and macronix flashes with TI's dra7xx, > > > > > k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, > > > > > I would greatly appreciate testing on other platforms. Complete series > > > > > with dependencies here[1] > > > > > > > > > > For clean build on some platforms, depends on CONFIG_SPI_FLASH migration > > > > > to defconfigs [2] > > > > > > > > > > [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 > > > > > [2] https://patchwork.ozlabs.org/patch/1007485/ > > > > > > > > > > Vignesh R (20): > > > > > configs: Move CONFIG_SPI_FLASH into defconfigs > > > > > bitops: Fix GENMASK definition for Sandbox > > > > > spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes > > > > > spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size > > > > > spi: spi-mem: Claim SPI bus before spi mem access > > > > > spi: Add non DM version of SPI_MEM > > > > > sh: bitops: add hweight*() macros > > > > > mtd: spi: Port SPI NOR framework from Linux > > > > > mtd: spi: spi-nor-core: Add SPI MEM support > > > > > mtd: spi: spi-nor-core: Add 4 Byte addressing support > > > > > mtd: spi: spi-nor-core: Add SFDP support > > > > > mtd: spi: spi-nor-core: Add back U-Boot specific features > > > > > mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string > > > > > mtd: spi: Switch to new SPI NOR framework > > > > > mtd: spi: Remove unused files > > > > > mtd: spi: Add lightweight SPI flash stack for SPL > > > > > spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL > > > > > configs: Remove SF_DUAL_FLASH > > > > > configs: Don't use SPI_FLASH_BAR as default > > > > > MAINTAINERS: Add an entry for SPI NOR > > > > > > > > Except 16/20 and 19/20, all look fine to me. > > > > > > > > Reviewed-by: Jagan Teki <jagan@openedev.com> > > > > Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed > > > > > > And based on the Xilinx folks reply to 19/20, is 16/20 something we can > > > deal with as a follow-up? Thanks! > > > > Going without 16/20 will increase the footprint in SPL. Given the limitation > > of size checks discussed recently, I don't think that would be a good idea. > > Please read the my comments again, I won't oppose the change. Ah, I think I have the numbers backwards then, I was thinking 19 was the one about BAR stuff and 16 was some style comments? But I do want to stress again that I want to see this come in and the we deal with any further fall-out, this cycle. Thanks!
On Thu, Jan 31, 2019 at 3:54 PM Tom Rini <trini@konsulko.com> wrote: > > On Thu, Jan 31, 2019 at 08:21:29PM +0530, Jagan Teki wrote: > > On Thu, Jan 31, 2019 at 8:18 PM Simon Goldschmidt > > <simon.k.r.goldschmidt@gmail.com> wrote: > > > > > > On Thu, Jan 31, 2019 at 3:43 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > On Thu, Jan 31, 2019 at 08:10:53PM +0530, Jagan Teki wrote: > > > > > On Tue, Jan 29, 2019 at 11:19 AM Vignesh R <vigneshr@ti.com> wrote: > > > > > > > > > > > > Here is the v3 of SPI NOR migration(github branch at [1]). I have > > > > > > retained Tested-by from v2 as this is just re split of patches and > > > > > > minor fixups. > > > > > > > > > > > > Travis ci reports all green. > > > > > > > > > > > > Change log: > > > > > > Since v2: > > > > > > Split sync up patches into smaller versions so that its easier for review. > > > > > > Address comments by Jagan and Simon Goldschmidt on v2. > > > > > > Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to > > > > > > offset against size increase due to new code. > > > > > > > > > > > > Since v1: > > > > > > Remove #ifindef __UBOOT__ > > > > > > Add back BAR support, but dont enable as default for all platform (see > > > > > > 10/11 for more details) > > > > > > Enable SPI_FLASH_TINY on boards where there is SPL size constraint as > > > > > > seen on travis ci builds. > > > > > > Drop sf_mtd changes for now as it seems to cause issues. > > > > > > v1: https://patchwork.ozlabs.org/cover/1012146/ > > > > > > > > > > > > Since RFC v2: > > > > > > Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode > > > > > > Fix issues in compiling SFDP code > > > > > > Re organize file names and Makefile to simply spi-nor-tiny inclusion > > > > > > Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used > > > > > > RFC v2: https://patchwork.ozlabs.org/cover/1007589/ > > > > > > > > > > > > Since RFC v1: > > > > > > Add lightweight SPI flash stack for boards with SPL size constraints > > > > > > Provide non DM version of spi-mem > > > > > > Fix build issues on different platforms as reported by travis-ci on v1 > > > > > > > > > > > > RFC v1: https://patchwork.ozlabs.org/cover/1004689/ > > > > > > > > > > > > Background: > > > > > > > > > > > > U-Boot SPI NOR support (sf layer) is quite outdated as it does not > > > > > > support 4 byte addressing opcodes, SFDP table parsing and different types of > > > > > > quad mode enable sequences. Many newer flashes no longer support BANK > > > > > > registers used by sf layer to a access >16MB space. > > > > > > Also, many SPI controllers have special MMIO interfaces which provide > > > > > > accelerated read/write access but require knowledge of flash parameters > > > > > > to make use of it. Recent spi-mem layer provides a way to support such > > > > > > flashes but sf layer isn't using that. > > > > > > This patch series syncs SPI NOR framework from Linux v4.19. It also adds > > > > > > spi-mem support on top. > > > > > > So, we gain 4byte addressing support and SFDP support. This makes > > > > > > migrating to U-Boot MTD framework easier. > > > > > > > > > > > > Tested with few Spansion, micron and macronix flashes with TI's dra7xx, > > > > > > k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, > > > > > > I would greatly appreciate testing on other platforms. Complete series > > > > > > with dependencies here[1] > > > > > > > > > > > > For clean build on some platforms, depends on CONFIG_SPI_FLASH migration > > > > > > to defconfigs [2] > > > > > > > > > > > > [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 > > > > > > [2] https://patchwork.ozlabs.org/patch/1007485/ > > > > > > > > > > > > Vignesh R (20): > > > > > > configs: Move CONFIG_SPI_FLASH into defconfigs > > > > > > bitops: Fix GENMASK definition for Sandbox > > > > > > spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes > > > > > > spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size > > > > > > spi: spi-mem: Claim SPI bus before spi mem access > > > > > > spi: Add non DM version of SPI_MEM > > > > > > sh: bitops: add hweight*() macros > > > > > > mtd: spi: Port SPI NOR framework from Linux > > > > > > mtd: spi: spi-nor-core: Add SPI MEM support > > > > > > mtd: spi: spi-nor-core: Add 4 Byte addressing support > > > > > > mtd: spi: spi-nor-core: Add SFDP support > > > > > > mtd: spi: spi-nor-core: Add back U-Boot specific features > > > > > > mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string > > > > > > mtd: spi: Switch to new SPI NOR framework > > > > > > mtd: spi: Remove unused files > > > > > > mtd: spi: Add lightweight SPI flash stack for SPL > > > > > > spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL > > > > > > configs: Remove SF_DUAL_FLASH > > > > > > configs: Don't use SPI_FLASH_BAR as default > > > > > > MAINTAINERS: Add an entry for SPI NOR > > > > > > > > > > Except 16/20 and 19/20, all look fine to me. > > > > > > > > > > Reviewed-by: Jagan Teki <jagan@openedev.com> > > > > > Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed > > > > > > > > And based on the Xilinx folks reply to 19/20, is 16/20 something we can > > > > deal with as a follow-up? Thanks! > > > > > > Going without 16/20 will increase the footprint in SPL. Given the limitation > > > of size checks discussed recently, I don't think that would be a good idea. > > > > Please read the my comments again, I won't oppose the change. > > Ah, I think I have the numbers backwards then, I was thinking 19 was the > one about BAR stuff and 16 was some style comments? But I do want to > stress again that I want to see this come in and the we deal with any > further fall-out, this cycle. Thanks! You were right about 19 (BAR). But 16 contains size-improvements for SPL. The new framework as is lets SPL grow. Patch 16 introduces size improvements for SPL that are a bit unrelated to this series but help making it acceptable because it ensures this series as a whole does not grow SPL. Oh, you meant commit 16 as is and make style changes later? Regards, Simon
On Thu, Jan 31, 2019 at 8:24 PM Tom Rini <trini@konsulko.com> wrote: > > On Thu, Jan 31, 2019 at 08:21:29PM +0530, Jagan Teki wrote: > > On Thu, Jan 31, 2019 at 8:18 PM Simon Goldschmidt > > <simon.k.r.goldschmidt@gmail.com> wrote: > > > > > > On Thu, Jan 31, 2019 at 3:43 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > On Thu, Jan 31, 2019 at 08:10:53PM +0530, Jagan Teki wrote: > > > > > On Tue, Jan 29, 2019 at 11:19 AM Vignesh R <vigneshr@ti.com> wrote: > > > > > > > > > > > > Here is the v3 of SPI NOR migration(github branch at [1]). I have > > > > > > retained Tested-by from v2 as this is just re split of patches and > > > > > > minor fixups. > > > > > > > > > > > > Travis ci reports all green. > > > > > > > > > > > > Change log: > > > > > > Since v2: > > > > > > Split sync up patches into smaller versions so that its easier for review. > > > > > > Address comments by Jagan and Simon Goldschmidt on v2. > > > > > > Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to > > > > > > offset against size increase due to new code. > > > > > > > > > > > > Since v1: > > > > > > Remove #ifindef __UBOOT__ > > > > > > Add back BAR support, but dont enable as default for all platform (see > > > > > > 10/11 for more details) > > > > > > Enable SPI_FLASH_TINY on boards where there is SPL size constraint as > > > > > > seen on travis ci builds. > > > > > > Drop sf_mtd changes for now as it seems to cause issues. > > > > > > v1: https://patchwork.ozlabs.org/cover/1012146/ > > > > > > > > > > > > Since RFC v2: > > > > > > Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode > > > > > > Fix issues in compiling SFDP code > > > > > > Re organize file names and Makefile to simply spi-nor-tiny inclusion > > > > > > Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used > > > > > > RFC v2: https://patchwork.ozlabs.org/cover/1007589/ > > > > > > > > > > > > Since RFC v1: > > > > > > Add lightweight SPI flash stack for boards with SPL size constraints > > > > > > Provide non DM version of spi-mem > > > > > > Fix build issues on different platforms as reported by travis-ci on v1 > > > > > > > > > > > > RFC v1: https://patchwork.ozlabs.org/cover/1004689/ > > > > > > > > > > > > Background: > > > > > > > > > > > > U-Boot SPI NOR support (sf layer) is quite outdated as it does not > > > > > > support 4 byte addressing opcodes, SFDP table parsing and different types of > > > > > > quad mode enable sequences. Many newer flashes no longer support BANK > > > > > > registers used by sf layer to a access >16MB space. > > > > > > Also, many SPI controllers have special MMIO interfaces which provide > > > > > > accelerated read/write access but require knowledge of flash parameters > > > > > > to make use of it. Recent spi-mem layer provides a way to support such > > > > > > flashes but sf layer isn't using that. > > > > > > This patch series syncs SPI NOR framework from Linux v4.19. It also adds > > > > > > spi-mem support on top. > > > > > > So, we gain 4byte addressing support and SFDP support. This makes > > > > > > migrating to U-Boot MTD framework easier. > > > > > > > > > > > > Tested with few Spansion, micron and macronix flashes with TI's dra7xx, > > > > > > k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, > > > > > > I would greatly appreciate testing on other platforms. Complete series > > > > > > with dependencies here[1] > > > > > > > > > > > > For clean build on some platforms, depends on CONFIG_SPI_FLASH migration > > > > > > to defconfigs [2] > > > > > > > > > > > > [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 > > > > > > [2] https://patchwork.ozlabs.org/patch/1007485/ > > > > > > > > > > > > Vignesh R (20): > > > > > > configs: Move CONFIG_SPI_FLASH into defconfigs > > > > > > bitops: Fix GENMASK definition for Sandbox > > > > > > spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes > > > > > > spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size > > > > > > spi: spi-mem: Claim SPI bus before spi mem access > > > > > > spi: Add non DM version of SPI_MEM > > > > > > sh: bitops: add hweight*() macros > > > > > > mtd: spi: Port SPI NOR framework from Linux > > > > > > mtd: spi: spi-nor-core: Add SPI MEM support > > > > > > mtd: spi: spi-nor-core: Add 4 Byte addressing support > > > > > > mtd: spi: spi-nor-core: Add SFDP support > > > > > > mtd: spi: spi-nor-core: Add back U-Boot specific features > > > > > > mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string > > > > > > mtd: spi: Switch to new SPI NOR framework > > > > > > mtd: spi: Remove unused files > > > > > > mtd: spi: Add lightweight SPI flash stack for SPL > > > > > > spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL > > > > > > configs: Remove SF_DUAL_FLASH > > > > > > configs: Don't use SPI_FLASH_BAR as default > > > > > > MAINTAINERS: Add an entry for SPI NOR > > > > > > > > > > Except 16/20 and 19/20, all look fine to me. > > > > > > > > > > Reviewed-by: Jagan Teki <jagan@openedev.com> > > > > > Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed > > > > > > > > And based on the Xilinx folks reply to 19/20, is 16/20 something we can > > > > deal with as a follow-up? Thanks! > > > > > > Going without 16/20 will increase the footprint in SPL. Given the limitation > > > of size checks discussed recently, I don't think that would be a good idea. > > > > Please read the my comments again, I won't oppose the change. > > Ah, I think I have the numbers backwards then, I was thinking 19 was the > one about BAR stuff and 16 was some style comments? But I do want to > stress again that I want to see this come in and the we deal with any > further fall-out, this cycle. Thanks! BAR change can be alter(even I change while applying) 16/20, has some code removed and same was added during 08/20, I commented to add that part of 08/20. even style changes can be fixed while applying.
On Thu, Jan 31, 2019 at 03:58:25PM +0100, Simon Goldschmidt wrote: > On Thu, Jan 31, 2019 at 3:54 PM Tom Rini <trini@konsulko.com> wrote: > > > > On Thu, Jan 31, 2019 at 08:21:29PM +0530, Jagan Teki wrote: > > > On Thu, Jan 31, 2019 at 8:18 PM Simon Goldschmidt > > > <simon.k.r.goldschmidt@gmail.com> wrote: > > > > > > > > On Thu, Jan 31, 2019 at 3:43 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > On Thu, Jan 31, 2019 at 08:10:53PM +0530, Jagan Teki wrote: > > > > > > On Tue, Jan 29, 2019 at 11:19 AM Vignesh R <vigneshr@ti.com> wrote: > > > > > > > > > > > > > > Here is the v3 of SPI NOR migration(github branch at [1]). I have > > > > > > > retained Tested-by from v2 as this is just re split of patches and > > > > > > > minor fixups. > > > > > > > > > > > > > > Travis ci reports all green. > > > > > > > > > > > > > > Change log: > > > > > > > Since v2: > > > > > > > Split sync up patches into smaller versions so that its easier for review. > > > > > > > Address comments by Jagan and Simon Goldschmidt on v2. > > > > > > > Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to > > > > > > > offset against size increase due to new code. > > > > > > > > > > > > > > Since v1: > > > > > > > Remove #ifindef __UBOOT__ > > > > > > > Add back BAR support, but dont enable as default for all platform (see > > > > > > > 10/11 for more details) > > > > > > > Enable SPI_FLASH_TINY on boards where there is SPL size constraint as > > > > > > > seen on travis ci builds. > > > > > > > Drop sf_mtd changes for now as it seems to cause issues. > > > > > > > v1: https://patchwork.ozlabs.org/cover/1012146/ > > > > > > > > > > > > > > Since RFC v2: > > > > > > > Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode > > > > > > > Fix issues in compiling SFDP code > > > > > > > Re organize file names and Makefile to simply spi-nor-tiny inclusion > > > > > > > Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used > > > > > > > RFC v2: https://patchwork.ozlabs.org/cover/1007589/ > > > > > > > > > > > > > > Since RFC v1: > > > > > > > Add lightweight SPI flash stack for boards with SPL size constraints > > > > > > > Provide non DM version of spi-mem > > > > > > > Fix build issues on different platforms as reported by travis-ci on v1 > > > > > > > > > > > > > > RFC v1: https://patchwork.ozlabs.org/cover/1004689/ > > > > > > > > > > > > > > Background: > > > > > > > > > > > > > > U-Boot SPI NOR support (sf layer) is quite outdated as it does not > > > > > > > support 4 byte addressing opcodes, SFDP table parsing and different types of > > > > > > > quad mode enable sequences. Many newer flashes no longer support BANK > > > > > > > registers used by sf layer to a access >16MB space. > > > > > > > Also, many SPI controllers have special MMIO interfaces which provide > > > > > > > accelerated read/write access but require knowledge of flash parameters > > > > > > > to make use of it. Recent spi-mem layer provides a way to support such > > > > > > > flashes but sf layer isn't using that. > > > > > > > This patch series syncs SPI NOR framework from Linux v4.19. It also adds > > > > > > > spi-mem support on top. > > > > > > > So, we gain 4byte addressing support and SFDP support. This makes > > > > > > > migrating to U-Boot MTD framework easier. > > > > > > > > > > > > > > Tested with few Spansion, micron and macronix flashes with TI's dra7xx, > > > > > > > k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, > > > > > > > I would greatly appreciate testing on other platforms. Complete series > > > > > > > with dependencies here[1] > > > > > > > > > > > > > > For clean build on some platforms, depends on CONFIG_SPI_FLASH migration > > > > > > > to defconfigs [2] > > > > > > > > > > > > > > [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 > > > > > > > [2] https://patchwork.ozlabs.org/patch/1007485/ > > > > > > > > > > > > > > Vignesh R (20): > > > > > > > configs: Move CONFIG_SPI_FLASH into defconfigs > > > > > > > bitops: Fix GENMASK definition for Sandbox > > > > > > > spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes > > > > > > > spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size > > > > > > > spi: spi-mem: Claim SPI bus before spi mem access > > > > > > > spi: Add non DM version of SPI_MEM > > > > > > > sh: bitops: add hweight*() macros > > > > > > > mtd: spi: Port SPI NOR framework from Linux > > > > > > > mtd: spi: spi-nor-core: Add SPI MEM support > > > > > > > mtd: spi: spi-nor-core: Add 4 Byte addressing support > > > > > > > mtd: spi: spi-nor-core: Add SFDP support > > > > > > > mtd: spi: spi-nor-core: Add back U-Boot specific features > > > > > > > mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string > > > > > > > mtd: spi: Switch to new SPI NOR framework > > > > > > > mtd: spi: Remove unused files > > > > > > > mtd: spi: Add lightweight SPI flash stack for SPL > > > > > > > spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL > > > > > > > configs: Remove SF_DUAL_FLASH > > > > > > > configs: Don't use SPI_FLASH_BAR as default > > > > > > > MAINTAINERS: Add an entry for SPI NOR > > > > > > > > > > > > Except 16/20 and 19/20, all look fine to me. > > > > > > > > > > > > Reviewed-by: Jagan Teki <jagan@openedev.com> > > > > > > Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed > > > > > > > > > > And based on the Xilinx folks reply to 19/20, is 16/20 something we can > > > > > deal with as a follow-up? Thanks! > > > > > > > > Going without 16/20 will increase the footprint in SPL. Given the limitation > > > > of size checks discussed recently, I don't think that would be a good idea. > > > > > > Please read the my comments again, I won't oppose the change. > > > > Ah, I think I have the numbers backwards then, I was thinking 19 was the > > one about BAR stuff and 16 was some style comments? But I do want to > > stress again that I want to see this come in and the we deal with any > > further fall-out, this cycle. Thanks! > > You were right about 19 (BAR). But 16 contains size-improvements for SPL. > The new framework as is lets SPL grow. Patch 16 introduces size improvements > for SPL that are a bit unrelated to this series but help making it acceptable > because it ensures this series as a whole does not grow SPL. > > Oh, you meant commit 16 as is and make style changes later? I mean, I think I should finish this cup of coffee before it gets cold and re-check the comments. I swear I saw Jagan request some changes to one patch over importing various unused kernel code (EXPORT_SYMBOL_GPL, etc). That seems like something to address after. And with respect to the BAR changes, I really want to see the answer from the Xilinx folks.
On Thu, Jan 31, 2019 at 4:02 PM Tom Rini <trini@konsulko.com> wrote: > > On Thu, Jan 31, 2019 at 03:58:25PM +0100, Simon Goldschmidt wrote: > > On Thu, Jan 31, 2019 at 3:54 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > On Thu, Jan 31, 2019 at 08:21:29PM +0530, Jagan Teki wrote: > > > > On Thu, Jan 31, 2019 at 8:18 PM Simon Goldschmidt > > > > <simon.k.r.goldschmidt@gmail.com> wrote: > > > > > > > > > > On Thu, Jan 31, 2019 at 3:43 PM Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > On Thu, Jan 31, 2019 at 08:10:53PM +0530, Jagan Teki wrote: > > > > > > > On Tue, Jan 29, 2019 at 11:19 AM Vignesh R <vigneshr@ti.com> wrote: > > > > > > > > > > > > > > > > Here is the v3 of SPI NOR migration(github branch at [1]). I have > > > > > > > > retained Tested-by from v2 as this is just re split of patches and > > > > > > > > minor fixups. > > > > > > > > > > > > > > > > Travis ci reports all green. > > > > > > > > > > > > > > > > Change log: > > > > > > > > Since v2: > > > > > > > > Split sync up patches into smaller versions so that its easier for review. > > > > > > > > Address comments by Jagan and Simon Goldschmidt on v2. > > > > > > > > Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to > > > > > > > > offset against size increase due to new code. > > > > > > > > > > > > > > > > Since v1: > > > > > > > > Remove #ifindef __UBOOT__ > > > > > > > > Add back BAR support, but dont enable as default for all platform (see > > > > > > > > 10/11 for more details) > > > > > > > > Enable SPI_FLASH_TINY on boards where there is SPL size constraint as > > > > > > > > seen on travis ci builds. > > > > > > > > Drop sf_mtd changes for now as it seems to cause issues. > > > > > > > > v1: https://patchwork.ozlabs.org/cover/1012146/ > > > > > > > > > > > > > > > > Since RFC v2: > > > > > > > > Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode > > > > > > > > Fix issues in compiling SFDP code > > > > > > > > Re organize file names and Makefile to simply spi-nor-tiny inclusion > > > > > > > > Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used > > > > > > > > RFC v2: https://patchwork.ozlabs.org/cover/1007589/ > > > > > > > > > > > > > > > > Since RFC v1: > > > > > > > > Add lightweight SPI flash stack for boards with SPL size constraints > > > > > > > > Provide non DM version of spi-mem > > > > > > > > Fix build issues on different platforms as reported by travis-ci on v1 > > > > > > > > > > > > > > > > RFC v1: https://patchwork.ozlabs.org/cover/1004689/ > > > > > > > > > > > > > > > > Background: > > > > > > > > > > > > > > > > U-Boot SPI NOR support (sf layer) is quite outdated as it does not > > > > > > > > support 4 byte addressing opcodes, SFDP table parsing and different types of > > > > > > > > quad mode enable sequences. Many newer flashes no longer support BANK > > > > > > > > registers used by sf layer to a access >16MB space. > > > > > > > > Also, many SPI controllers have special MMIO interfaces which provide > > > > > > > > accelerated read/write access but require knowledge of flash parameters > > > > > > > > to make use of it. Recent spi-mem layer provides a way to support such > > > > > > > > flashes but sf layer isn't using that. > > > > > > > > This patch series syncs SPI NOR framework from Linux v4.19. It also adds > > > > > > > > spi-mem support on top. > > > > > > > > So, we gain 4byte addressing support and SFDP support. This makes > > > > > > > > migrating to U-Boot MTD framework easier. > > > > > > > > > > > > > > > > Tested with few Spansion, micron and macronix flashes with TI's dra7xx, > > > > > > > > k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, > > > > > > > > I would greatly appreciate testing on other platforms. Complete series > > > > > > > > with dependencies here[1] > > > > > > > > > > > > > > > > For clean build on some platforms, depends on CONFIG_SPI_FLASH migration > > > > > > > > to defconfigs [2] > > > > > > > > > > > > > > > > [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 > > > > > > > > [2] https://patchwork.ozlabs.org/patch/1007485/ > > > > > > > > > > > > > > > > Vignesh R (20): > > > > > > > > configs: Move CONFIG_SPI_FLASH into defconfigs > > > > > > > > bitops: Fix GENMASK definition for Sandbox > > > > > > > > spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes > > > > > > > > spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size > > > > > > > > spi: spi-mem: Claim SPI bus before spi mem access > > > > > > > > spi: Add non DM version of SPI_MEM > > > > > > > > sh: bitops: add hweight*() macros > > > > > > > > mtd: spi: Port SPI NOR framework from Linux > > > > > > > > mtd: spi: spi-nor-core: Add SPI MEM support > > > > > > > > mtd: spi: spi-nor-core: Add 4 Byte addressing support > > > > > > > > mtd: spi: spi-nor-core: Add SFDP support > > > > > > > > mtd: spi: spi-nor-core: Add back U-Boot specific features > > > > > > > > mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string > > > > > > > > mtd: spi: Switch to new SPI NOR framework > > > > > > > > mtd: spi: Remove unused files > > > > > > > > mtd: spi: Add lightweight SPI flash stack for SPL > > > > > > > > spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL > > > > > > > > configs: Remove SF_DUAL_FLASH > > > > > > > > configs: Don't use SPI_FLASH_BAR as default > > > > > > > > MAINTAINERS: Add an entry for SPI NOR > > > > > > > > > > > > > > Except 16/20 and 19/20, all look fine to me. > > > > > > > > > > > > > > Reviewed-by: Jagan Teki <jagan@openedev.com> > > > > > > > Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed > > > > > > > > > > > > And based on the Xilinx folks reply to 19/20, is 16/20 something we can > > > > > > deal with as a follow-up? Thanks! > > > > > > > > > > Going without 16/20 will increase the footprint in SPL. Given the limitation > > > > > of size checks discussed recently, I don't think that would be a good idea. > > > > > > > > Please read the my comments again, I won't oppose the change. > > > > > > Ah, I think I have the numbers backwards then, I was thinking 19 was the > > > one about BAR stuff and 16 was some style comments? But I do want to > > > stress again that I want to see this come in and the we deal with any > > > further fall-out, this cycle. Thanks! > > > > You were right about 19 (BAR). But 16 contains size-improvements for SPL. > > The new framework as is lets SPL grow. Patch 16 introduces size improvements > > for SPL that are a bit unrelated to this series but help making it acceptable > > because it ensures this series as a whole does not grow SPL. > > > > Oh, you meant commit 16 as is and make style changes later? > > I mean, I think I should finish this cup of coffee before it gets cold > and re-check the comments. I swear I saw Jagan request some changes to > one patch over importing various unused kernel code (EXPORT_SYMBOL_GPL, > etc). That seems like something to address after. And with respect to > the BAR changes, I really want to see the answer from the Xilinx folks. OK, then I fully agree. About the Xilinx BAR stuff: I took the time to dig into the TRM of Zynq 7000 [1] as an example. It says it can only access 16 MiB from one chip (unless using raw SPI mode in which it only uses one data line). But then it also says: "evice densities up to 128 Mb for I/O and linear mode. Densities greater than 128 Mb are supported in I/O mode". So which is it now? [1] https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf Regards, Simon
On 31/01/19 8:15 PM, Jagan Teki wrote: > On Thu, Jan 31, 2019 at 8:12 PM Tom Rini <trini@konsulko.com> wrote: >> >> On Thu, Jan 31, 2019 at 08:10:53PM +0530, Jagan Teki wrote: >>> On Tue, Jan 29, 2019 at 11:19 AM Vignesh R <vigneshr@ti.com> wrote: >>>> >>>> Here is the v3 of SPI NOR migration(github branch at [1]). I have >>>> retained Tested-by from v2 as this is just re split of patches and >>>> minor fixups. >>>> >>>> Travis ci reports all green. >>>> >>>> Change log: >>>> Since v2: >>>> Split sync up patches into smaller versions so that its easier for review. >>>> Address comments by Jagan and Simon Goldschmidt on v2. >>>> Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to >>>> offset against size increase due to new code. >>>> >>>> Since v1: >>>> Remove #ifindef __UBOOT__ >>>> Add back BAR support, but dont enable as default for all platform (see >>>> 10/11 for more details) >>>> Enable SPI_FLASH_TINY on boards where there is SPL size constraint as >>>> seen on travis ci builds. >>>> Drop sf_mtd changes for now as it seems to cause issues. >>>> v1: https://patchwork.ozlabs.org/cover/1012146/ >>>> >>>> Since RFC v2: >>>> Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode >>>> Fix issues in compiling SFDP code >>>> Re organize file names and Makefile to simply spi-nor-tiny inclusion >>>> Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used >>>> RFC v2: https://patchwork.ozlabs.org/cover/1007589/ >>>> >>>> Since RFC v1: >>>> Add lightweight SPI flash stack for boards with SPL size constraints >>>> Provide non DM version of spi-mem >>>> Fix build issues on different platforms as reported by travis-ci on v1 >>>> >>>> RFC v1: https://patchwork.ozlabs.org/cover/1004689/ >>>> >>>> Background: >>>> >>>> U-Boot SPI NOR support (sf layer) is quite outdated as it does not >>>> support 4 byte addressing opcodes, SFDP table parsing and different types of >>>> quad mode enable sequences. Many newer flashes no longer support BANK >>>> registers used by sf layer to a access >16MB space. >>>> Also, many SPI controllers have special MMIO interfaces which provide >>>> accelerated read/write access but require knowledge of flash parameters >>>> to make use of it. Recent spi-mem layer provides a way to support such >>>> flashes but sf layer isn't using that. >>>> This patch series syncs SPI NOR framework from Linux v4.19. It also adds >>>> spi-mem support on top. >>>> So, we gain 4byte addressing support and SFDP support. This makes >>>> migrating to U-Boot MTD framework easier. >>>> >>>> Tested with few Spansion, micron and macronix flashes with TI's dra7xx, >>>> k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, >>>> I would greatly appreciate testing on other platforms. Complete series >>>> with dependencies here[1] >>>> >>>> For clean build on some platforms, depends on CONFIG_SPI_FLASH migration >>>> to defconfigs [2] >>>> >>>> [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 >>>> [2] https://patchwork.ozlabs.org/patch/1007485/ >>>> >>>> Vignesh R (20): >>>> configs: Move CONFIG_SPI_FLASH into defconfigs >>>> bitops: Fix GENMASK definition for Sandbox >>>> spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes >>>> spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size >>>> spi: spi-mem: Claim SPI bus before spi mem access >>>> spi: Add non DM version of SPI_MEM >>>> sh: bitops: add hweight*() macros >>>> mtd: spi: Port SPI NOR framework from Linux >>>> mtd: spi: spi-nor-core: Add SPI MEM support >>>> mtd: spi: spi-nor-core: Add 4 Byte addressing support >>>> mtd: spi: spi-nor-core: Add SFDP support >>>> mtd: spi: spi-nor-core: Add back U-Boot specific features >>>> mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string >>>> mtd: spi: Switch to new SPI NOR framework >>>> mtd: spi: Remove unused files >>>> mtd: spi: Add lightweight SPI flash stack for SPL >>>> spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL >>>> configs: Remove SF_DUAL_FLASH >>>> configs: Don't use SPI_FLASH_BAR as default >>>> MAINTAINERS: Add an entry for SPI NOR >>> >>> Except 16/20 and 19/20, all look fine to me. >>> >>> Reviewed-by: Jagan Teki <jagan@openedev.com> >>> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed Thanks for all the reviews! >> >> And based on the Xilinx folks reply to 19/20, is 16/20 something we can >> deal with as a follow-up? Thanks! > > 19/20, can (If some don't believe me) and 16/20 can be fixed here. > I have replied to individual patches. In summary, 19/20 can be fixed as a follow up patch if Zynq SoCs cant really support 4 byte addressing. I will send a follow up patch to remove MODULE_LICENSE(), EXPORT_SYMBOL_GPL() macros. I dont plan to respin unless there are more objections
On Fri, Feb 1, 2019 at 1:56 PM Vignesh R <vigneshr@ti.com> wrote: > > > > On 31/01/19 8:15 PM, Jagan Teki wrote: > > On Thu, Jan 31, 2019 at 8:12 PM Tom Rini <trini@konsulko.com> wrote: > >> > >> On Thu, Jan 31, 2019 at 08:10:53PM +0530, Jagan Teki wrote: > >>> On Tue, Jan 29, 2019 at 11:19 AM Vignesh R <vigneshr@ti.com> wrote: > >>>> > >>>> Here is the v3 of SPI NOR migration(github branch at [1]). I have > >>>> retained Tested-by from v2 as this is just re split of patches and > >>>> minor fixups. > >>>> > >>>> Travis ci reports all green. > >>>> > >>>> Change log: > >>>> Since v2: > >>>> Split sync up patches into smaller versions so that its easier for review. > >>>> Address comments by Jagan and Simon Goldschmidt on v2. > >>>> Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to > >>>> offset against size increase due to new code. > >>>> > >>>> Since v1: > >>>> Remove #ifindef __UBOOT__ > >>>> Add back BAR support, but dont enable as default for all platform (see > >>>> 10/11 for more details) > >>>> Enable SPI_FLASH_TINY on boards where there is SPL size constraint as > >>>> seen on travis ci builds. > >>>> Drop sf_mtd changes for now as it seems to cause issues. > >>>> v1: https://patchwork.ozlabs.org/cover/1012146/ > >>>> > >>>> Since RFC v2: > >>>> Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode > >>>> Fix issues in compiling SFDP code > >>>> Re organize file names and Makefile to simply spi-nor-tiny inclusion > >>>> Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used > >>>> RFC v2: https://patchwork.ozlabs.org/cover/1007589/ > >>>> > >>>> Since RFC v1: > >>>> Add lightweight SPI flash stack for boards with SPL size constraints > >>>> Provide non DM version of spi-mem > >>>> Fix build issues on different platforms as reported by travis-ci on v1 > >>>> > >>>> RFC v1: https://patchwork.ozlabs.org/cover/1004689/ > >>>> > >>>> Background: > >>>> > >>>> U-Boot SPI NOR support (sf layer) is quite outdated as it does not > >>>> support 4 byte addressing opcodes, SFDP table parsing and different types of > >>>> quad mode enable sequences. Many newer flashes no longer support BANK > >>>> registers used by sf layer to a access >16MB space. > >>>> Also, many SPI controllers have special MMIO interfaces which provide > >>>> accelerated read/write access but require knowledge of flash parameters > >>>> to make use of it. Recent spi-mem layer provides a way to support such > >>>> flashes but sf layer isn't using that. > >>>> This patch series syncs SPI NOR framework from Linux v4.19. It also adds > >>>> spi-mem support on top. > >>>> So, we gain 4byte addressing support and SFDP support. This makes > >>>> migrating to U-Boot MTD framework easier. > >>>> > >>>> Tested with few Spansion, micron and macronix flashes with TI's dra7xx, > >>>> k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, > >>>> I would greatly appreciate testing on other platforms. Complete series > >>>> with dependencies here[1] > >>>> > >>>> For clean build on some platforms, depends on CONFIG_SPI_FLASH migration > >>>> to defconfigs [2] > >>>> > >>>> [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v3 > >>>> [2] https://patchwork.ozlabs.org/patch/1007485/ > >>>> > >>>> Vignesh R (20): > >>>> configs: Move CONFIG_SPI_FLASH into defconfigs > >>>> bitops: Fix GENMASK definition for Sandbox > >>>> spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes > >>>> spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size > >>>> spi: spi-mem: Claim SPI bus before spi mem access > >>>> spi: Add non DM version of SPI_MEM > >>>> sh: bitops: add hweight*() macros > >>>> mtd: spi: Port SPI NOR framework from Linux > >>>> mtd: spi: spi-nor-core: Add SPI MEM support > >>>> mtd: spi: spi-nor-core: Add 4 Byte addressing support > >>>> mtd: spi: spi-nor-core: Add SFDP support > >>>> mtd: spi: spi-nor-core: Add back U-Boot specific features > >>>> mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string > >>>> mtd: spi: Switch to new SPI NOR framework > >>>> mtd: spi: Remove unused files > >>>> mtd: spi: Add lightweight SPI flash stack for SPL > >>>> spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL > >>>> configs: Remove SF_DUAL_FLASH > >>>> configs: Don't use SPI_FLASH_BAR as default > >>>> MAINTAINERS: Add an entry for SPI NOR > >>> > >>> Except 16/20 and 19/20, all look fine to me. > >>> > >>> Reviewed-by: Jagan Teki <jagan@openedev.com> > >>> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed > > Thanks for all the reviews! Waiting for v4. I tried applying but seems like config patches are unable to apply.