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[U-Boot,0/7] mmc: sunxi: Enable DM_MMC

Message ID 20190111180414.1563-1-jagan@amarulasolutions.com
Headers show
Series mmc: sunxi: Enable DM_MMC | expand

Message

Jagan Teki Jan. 11, 2019, 6:04 p.m. UTC
I thought of waiting this till CLK framework gets Mainline,
but migration deadline for DM_MMC and BLK seems expiring in 
next release. So instead of doing so huddle  and make some last 
minute changes, I have managed to add CLK, Reset code for mmc 
driver via driver data. 

Add for all Allwinner SoC's and enable at arch/arm/Kconfig.

I shall merge this in comming MW, so early test feel better
to go for the release. Request to test respective board takers.

Any inputs,
Jagan.

Jagan Teki (7):
  mmc: sunxi: Configure reset support for DM_MMC
  mmc: sunxi: Add A83T emmc compatible
  mmc: sunxi: Add mmc, emmc H5/A64 compatible
  mmc: sunxi: Add DM_MMC support for H6
  mmc: sunxi: Add DM_MMC support for A80
  arm: sunxi: Enable DM_MMC
  arm: dts: sunxi: Enumerate MMC2 as MMC1

 arch/arm/Kconfig                              |  1 +
 arch/arm/dts/sunxi-u-boot.dtsi                |  4 +
 .../include/asm/arch-sunxi/clock_sun50i_h6.h  |  3 +
 arch/arm/mach-sunxi/Kconfig                   |  1 -
 configs/Linksprite_pcDuino3_defconfig         |  1 -
 drivers/mmc/sunxi_mmc.c                       | 73 ++++++++++++++++++-
 6 files changed, 79 insertions(+), 4 deletions(-)

Comments

Vasily Khoruzhick Jan. 12, 2019, 12:02 a.m. UTC | #1
On Fri, Jan 11, 2019 at 10:04 AM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> I thought of waiting this till CLK framework gets Mainline,
> but migration deadline for DM_MMC and BLK seems expiring in
> next release. So instead of doing so huddle  and make some last
> minute changes, I have managed to add CLK, Reset code for mmc
> driver via driver data.
>
> Add for all Allwinner SoC's and enable at arch/arm/Kconfig.
>
> I shall merge this in comming MW, so early test feel better
> to go for the release. Request to test respective board takers.

Hi Jagan,

Do you have a branch with all the patches (including clk and reset)
that I can use to test the changes on Pine64 and Pinebook?

Regards,
Vasily

>
> Any inputs,
> Jagan.
>
> Jagan Teki (7):
>   mmc: sunxi: Configure reset support for DM_MMC
>   mmc: sunxi: Add A83T emmc compatible
>   mmc: sunxi: Add mmc, emmc H5/A64 compatible
>   mmc: sunxi: Add DM_MMC support for H6
>   mmc: sunxi: Add DM_MMC support for A80
>   arm: sunxi: Enable DM_MMC
>   arm: dts: sunxi: Enumerate MMC2 as MMC1
>
>  arch/arm/Kconfig                              |  1 +
>  arch/arm/dts/sunxi-u-boot.dtsi                |  4 +
>  .../include/asm/arch-sunxi/clock_sun50i_h6.h  |  3 +
>  arch/arm/mach-sunxi/Kconfig                   |  1 -
>  configs/Linksprite_pcDuino3_defconfig         |  1 -
>  drivers/mmc/sunxi_mmc.c                       | 73 ++++++++++++++++++-
>  6 files changed, 79 insertions(+), 4 deletions(-)
>
> --
> 2.18.0.321.gffc6fa0e3
>
> _______________________________________________
> U-Boot mailing list
> U-Boot@lists.denx.de
> https://lists.denx.de/listinfo/u-boot
Jagan Teki Jan. 12, 2019, 2:51 a.m. UTC | #2
On Sat, Jan 12, 2019 at 5:32 AM Vasily Khoruzhick <anarsoul@gmail.com> wrote:
>
> On Fri, Jan 11, 2019 at 10:04 AM Jagan Teki <jagan@amarulasolutions.com> wrote:
> >
> > I thought of waiting this till CLK framework gets Mainline,
> > but migration deadline for DM_MMC and BLK seems expiring in
> > next release. So instead of doing so huddle  and make some last
> > minute changes, I have managed to add CLK, Reset code for mmc
> > driver via driver data.
> >
> > Add for all Allwinner SoC's and enable at arch/arm/Kconfig.
> >
> > I shall merge this in comming MW, so early test feel better
> > to go for the release. Request to test respective board takers.
>
> Hi Jagan,
>
> Do you have a branch with all the patches (including clk and reset)
> that I can use to test the changes on Pine64 and Pinebook?

Please check it in u-boot-sunxi/next
Priit Laes Jan. 14, 2019, 9:35 a.m. UTC | #3
On Fri, Jan 11, 2019 at 11:34:07PM +0530, Jagan Teki wrote:
> I thought of waiting this till CLK framework gets Mainline,
> but migration deadline for DM_MMC and BLK seems expiring in 
> next release. So instead of doing so huddle  and make some last 
> minute changes, I have managed to add CLK, Reset code for mmc 
> driver via driver data. 

U-Boot 2019.01-rc3-00084-g0ce29380cf (Jan 14 2019 - 11:22:13 +0200) Allwinner Technology

CPU:   Allwinner A20 (SUN7I)
Model: Olimex A20-OLinuXino-LIME2-eMMC
I2C:   ready
DRAM:  1 GiB
MMC:   mmc@1c0f000: 0, mmc@1c11000: 1
Loading Environment from FAT... Card did not respond to voltage select!

eMMC seems to be broken:
=> mmc list
mmc@1c0f000: 0
mmc@1c11000: 1
=> mmc dev 1
=> mmc dev 0
MMC: no card present
=> mmc part
MMC: no card present
=> mmc info
MMC: no card present


Setting up a 640x480 dvi console (overscan 0x0)
In:    serial
Out:   vga
Err:   vga
Allwinner mUSB OTG (Peripheral)
SCSI:  SATA link 0 timeout.
AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode
flags: ncq stag pm led clo only pmp pio slum part ccc apst 

Net:   sunxi_set_gate: (CLK#66) unhandled
eth0: ethernet@1c50000


And also CLK#66 message

> 
> Add for all Allwinner SoC's and enable at arch/arm/Kconfig.
> 
> I shall merge this in comming MW, so early test feel better
> to go for the release. Request to test respective board takers.
> 
> Any inputs,
> Jagan.
> 
> Jagan Teki (7):
>   mmc: sunxi: Configure reset support for DM_MMC
>   mmc: sunxi: Add A83T emmc compatible
>   mmc: sunxi: Add mmc, emmc H5/A64 compatible
>   mmc: sunxi: Add DM_MMC support for H6
>   mmc: sunxi: Add DM_MMC support for A80
>   arm: sunxi: Enable DM_MMC
>   arm: dts: sunxi: Enumerate MMC2 as MMC1
> 
>  arch/arm/Kconfig                              |  1 +
>  arch/arm/dts/sunxi-u-boot.dtsi                |  4 +
>  .../include/asm/arch-sunxi/clock_sun50i_h6.h  |  3 +
>  arch/arm/mach-sunxi/Kconfig                   |  1 -
>  configs/Linksprite_pcDuino3_defconfig         |  1 -
>  drivers/mmc/sunxi_mmc.c                       | 73 ++++++++++++++++++-
>  6 files changed, 79 insertions(+), 4 deletions(-)
> 
> -- 
> 2.18.0.321.gffc6fa0e3
>
Jagan Teki Jan. 14, 2019, 10:10 a.m. UTC | #4
On Mon, Jan 14, 2019 at 3:05 PM Priit Laes <plaes@plaes.org> wrote:
>
> On Fri, Jan 11, 2019 at 11:34:07PM +0530, Jagan Teki wrote:
> > I thought of waiting this till CLK framework gets Mainline,
> > but migration deadline for DM_MMC and BLK seems expiring in
> > next release. So instead of doing so huddle  and make some last
> > minute changes, I have managed to add CLK, Reset code for mmc
> > driver via driver data.
>
> U-Boot 2019.01-rc3-00084-g0ce29380cf (Jan 14 2019 - 11:22:13 +0200) Allwinner Technology
>
> CPU:   Allwinner A20 (SUN7I)
> Model: Olimex A20-OLinuXino-LIME2-eMMC
> I2C:   ready
> DRAM:  1 GiB
> MMC:   mmc@1c0f000: 0, mmc@1c11000: 1
> Loading Environment from FAT... Card did not respond to voltage select!
>
> eMMC seems to be broken:
> => mmc list
> mmc@1c0f000: 0
> mmc@1c11000: 1
> => mmc dev 1
> => mmc dev 0
> MMC: no card present
> => mmc part
> MMC: no card present
> => mmc info
> MMC: no card present

Can you try this
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 33f1ec5e5a..7fab88c47f 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -648,7 +648,7 @@ static int sunxi_mmc_probe(struct udevice *dev)
        gate_reg = (void *)ccu_reg + priv->variant->gate_offset;
        setbits_le32(gate_reg, BIT(AHB_GATE_OFFSET_MMC(priv->mmc_no)));

-       if ((!IS_ENABLED(CONFIG_MACH_SUN4I)) && priv->variant->has_reset) {
+       if ((!IS_ENABLED(CONFIG_MACH_SUN7I)) && priv->variant->has_reset) {
                reset_reg = (void *)ccu_reg + priv->variant->reset_offset;
                setbits_le32(reset_reg, BIT(priv->mmc_no +
                             priv->variant->reset_start_bit));

>
> Setting up a 640x480 dvi console (overscan 0x0)
> In:    serial
> Out:   vga
> Err:   vga
> Allwinner mUSB OTG (Peripheral)
> SCSI:  SATA link 0 timeout.
> AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode
> flags: ncq stag pm led clo only pmp pio slum part ccc apst
>
> Net:   sunxi_set_gate: (CLK#66) unhandled
> eth0: ethernet@1c50000
>
>
> And also CLK#66 message

This is expected, looking EMAC clock from dw driver, will handle in
next series. to be noted we enable print.
Priit Laes Jan. 14, 2019, 10:22 a.m. UTC | #5
On Mon, Jan 14, 2019 at 03:40:37PM +0530, Jagan Teki wrote:
> On Mon, Jan 14, 2019 at 3:05 PM Priit Laes <plaes@plaes.org> wrote:
> >
> > On Fri, Jan 11, 2019 at 11:34:07PM +0530, Jagan Teki wrote:
> > > I thought of waiting this till CLK framework gets Mainline,
> > > but migration deadline for DM_MMC and BLK seems expiring in
> > > next release. So instead of doing so huddle  and make some last
> > > minute changes, I have managed to add CLK, Reset code for mmc
> > > driver via driver data.
> >
> > U-Boot 2019.01-rc3-00084-g0ce29380cf (Jan 14 2019 - 11:22:13 +0200) Allwinner Technology
> >
> > CPU:   Allwinner A20 (SUN7I)
> > Model: Olimex A20-OLinuXino-LIME2-eMMC
> > I2C:   ready
> > DRAM:  1 GiB
> > MMC:   mmc@1c0f000: 0, mmc@1c11000: 1
> > Loading Environment from FAT... Card did not respond to voltage select!
> >
> > eMMC seems to be broken:
> > => mmc list
> > mmc@1c0f000: 0
> > mmc@1c11000: 1
> > => mmc dev 1
> > => mmc dev 0
> > MMC: no card present
> > => mmc part
> > MMC: no card present
> > => mmc info
> > MMC: no card present
> 
> Can you try this
> diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
> index 33f1ec5e5a..7fab88c47f 100644
> --- a/drivers/mmc/sunxi_mmc.c
> +++ b/drivers/mmc/sunxi_mmc.c
> @@ -648,7 +648,7 @@ static int sunxi_mmc_probe(struct udevice *dev)
>         gate_reg = (void *)ccu_reg + priv->variant->gate_offset;
>         setbits_le32(gate_reg, BIT(AHB_GATE_OFFSET_MMC(priv->mmc_no)));
> 
> -       if ((!IS_ENABLED(CONFIG_MACH_SUN4I)) && priv->variant->has_reset) {
> +       if ((!IS_ENABLED(CONFIG_MACH_SUN7I)) && priv->variant->has_reset) {
>                 reset_reg = (void *)ccu_reg + priv->variant->reset_offset;
>                 setbits_le32(reset_reg, BIT(priv->mmc_no +
>                              priv->variant->reset_start_bit));

Still fails:

MMC: no card present
scanning bus for devices...
Found 0 device(s).

Device 0: unknown device

Device 0: unknown device

> >
> > Setting up a 640x480 dvi console (overscan 0x0)
> > In:    serial
> > Out:   vga
> > Err:   vga
> > Allwinner mUSB OTG (Peripheral)
> > SCSI:  SATA link 0 timeout.
> > AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode
> > flags: ncq stag pm led clo only pmp pio slum part ccc apst
> >
> > Net:   sunxi_set_gate: (CLK#66) unhandled
> > eth0: ethernet@1c50000
> >
> >
> > And also CLK#66 message
> 
> This is expected, looking EMAC clock from dw driver, will handle in
> next series. to be noted we enable print.
> 
> -- 
> You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.
Jagan Teki Jan. 14, 2019, 10:30 a.m. UTC | #6
On Mon 14 Jan, 2019, 3:53 PM Priit Laes <plaes@plaes.org wrote:

> On Mon, Jan 14, 2019 at 03:40:37PM +0530, Jagan Teki wrote:
> > On Mon, Jan 14, 2019 at 3:05 PM Priit Laes <plaes@plaes.org> wrote:
> > >
> > > On Fri, Jan 11, 2019 at 11:34:07PM +0530, Jagan Teki wrote:
> > > > I thought of waiting this till CLK framework gets Mainline,
> > > > but migration deadline for DM_MMC and BLK seems expiring in
> > > > next release. So instead of doing so huddle  and make some last
> > > > minute changes, I have managed to add CLK, Reset code for mmc
> > > > driver via driver data.
> > >
> > > U-Boot 2019.01-rc3-00084-g0ce29380cf (Jan 14 2019 - 11:22:13 +0200)
> Allwinner Technology
> > >
> > > CPU:   Allwinner A20 (SUN7I)
> > > Model: Olimex A20-OLinuXino-LIME2-eMMC
> > > I2C:   ready
> > > DRAM:  1 GiB
> > > MMC:   mmc@1c0f000: 0, mmc@1c11000: 1
> > > Loading Environment from FAT... Card did not respond to voltage select!
> > >
> > > eMMC seems to be broken:
> > > => mmc list
> > > mmc@1c0f000: 0
> > > mmc@1c11000: 1
> > > => mmc dev 1
> > > => mmc dev 0
> > > MMC: no card present
> > > => mmc part
> > > MMC: no card present
> > > => mmc info
> > > MMC: no card present
> >
> > Can you try this
> > diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
> > index 33f1ec5e5a..7fab88c47f 100644
> > --- a/drivers/mmc/sunxi_mmc.c
> > +++ b/drivers/mmc/sunxi_mmc.c
> > @@ -648,7 +648,7 @@ static int sunxi_mmc_probe(struct udevice *dev)
> >         gate_reg = (void *)ccu_reg + priv->variant->gate_offset;
> >         setbits_le32(gate_reg, BIT(AHB_GATE_OFFSET_MMC(priv->mmc_no)));
> >
> > -       if ((!IS_ENABLED(CONFIG_MACH_SUN4I)) &&
> priv->variant->has_reset) {
> > +       if ((!IS_ENABLED(CONFIG_MACH_SUN7I)) &&
> priv->variant->has_reset) {
> >                 reset_reg = (void *)ccu_reg +
> priv->variant->reset_offset;
> >                 setbits_le32(reset_reg, BIT(priv->mmc_no +
> >                              priv->variant->reset_start_bit));
>
> Still fails:
>
> MMC: no card present
> scanning bus for devices...
> Found 0 device(s).
>
> Device 0: unknown device
>
> Device 0: unknown device
>

Can you print the reg values mclk and gate_reg. I have Lime2 which is fine
but doesn't have eMMC.
Priit Laes Jan. 14, 2019, 10:39 a.m. UTC | #7
On Mon, Jan 14, 2019 at 04:00:44PM +0530, Jagan Teki wrote:
> On Mon 14 Jan, 2019, 3:53 PM Priit Laes <plaes@plaes.org wrote:
> 
> > On Mon, Jan 14, 2019 at 03:40:37PM +0530, Jagan Teki wrote:
> > > On Mon, Jan 14, 2019 at 3:05 PM Priit Laes <plaes@plaes.org> wrote:
> > > >
> > > > On Fri, Jan 11, 2019 at 11:34:07PM +0530, Jagan Teki wrote:
> > > > > I thought of waiting this till CLK framework gets Mainline,
> > > > > but migration deadline for DM_MMC and BLK seems expiring in
> > > > > next release. So instead of doing so huddle  and make some last
> > > > > minute changes, I have managed to add CLK, Reset code for mmc
> > > > > driver via driver data.
> > > >
> > > > U-Boot 2019.01-rc3-00084-g0ce29380cf (Jan 14 2019 - 11:22:13 +0200)
> > Allwinner Technology
> > > >
> > > > CPU:   Allwinner A20 (SUN7I)
> > > > Model: Olimex A20-OLinuXino-LIME2-eMMC
> > > > I2C:   ready
> > > > DRAM:  1 GiB
> > > > MMC:   mmc@1c0f000: 0, mmc@1c11000: 1
> > > > Loading Environment from FAT... Card did not respond to voltage select!
> > > >
> > > > eMMC seems to be broken:
> > > > => mmc list
> > > > mmc@1c0f000: 0
> > > > mmc@1c11000: 1
> > > > => mmc dev 1
> > > > => mmc dev 0
> > > > MMC: no card present
> > > > => mmc part
> > > > MMC: no card present
> > > > => mmc info
> > > > MMC: no card present
> > >
> > > Can you try this
> > > diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
> > > index 33f1ec5e5a..7fab88c47f 100644
> > > --- a/drivers/mmc/sunxi_mmc.c
> > > +++ b/drivers/mmc/sunxi_mmc.c
> > > @@ -648,7 +648,7 @@ static int sunxi_mmc_probe(struct udevice *dev)
> > >         gate_reg = (void *)ccu_reg + priv->variant->gate_offset;
> > >         setbits_le32(gate_reg, BIT(AHB_GATE_OFFSET_MMC(priv->mmc_no)));
> > >
> > > -       if ((!IS_ENABLED(CONFIG_MACH_SUN4I)) &&
> > priv->variant->has_reset) {
> > > +       if ((!IS_ENABLED(CONFIG_MACH_SUN7I)) &&
> > priv->variant->has_reset) {
> > >                 reset_reg = (void *)ccu_reg +
> > priv->variant->reset_offset;
> > >                 setbits_le32(reset_reg, BIT(priv->mmc_no +
> > >                              priv->variant->reset_start_bit));
> >
> > Still fails:
> >
> > MMC: no card present
> > scanning bus for devices...
> > Found 0 device(s).
> >
> > Device 0: unknown device
> >
> > Device 0: unknown device
> >
> 
> Can you print the reg values mclk and gate_reg. I have Lime2 which is fine
> but doesn't have eMMC.

mclk0: 0x0
gate0: 0x200c141
mclk2: 0x0
gate2: 0x200c541

> 
> -- 
> You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.
Priit Laes Jan. 14, 2019, 10:51 a.m. UTC | #8
On Mon, Jan 14, 2019 at 10:39:37AM +0000, Priit Laes wrote:
> On Mon, Jan 14, 2019 at 04:00:44PM +0530, Jagan Teki wrote:
> > On Mon 14 Jan, 2019, 3:53 PM Priit Laes <plaes@plaes.org wrote:
> > 
> > > On Mon, Jan 14, 2019 at 03:40:37PM +0530, Jagan Teki wrote:
> > > > On Mon, Jan 14, 2019 at 3:05 PM Priit Laes <plaes@plaes.org> wrote:
> > > > >
> > > > > On Fri, Jan 11, 2019 at 11:34:07PM +0530, Jagan Teki wrote:
> > > > > > I thought of waiting this till CLK framework gets Mainline,
> > > > > > but migration deadline for DM_MMC and BLK seems expiring in
> > > > > > next release. So instead of doing so huddle  and make some last
> > > > > > minute changes, I have managed to add CLK, Reset code for mmc
> > > > > > driver via driver data.
> > > > >
> > > > > U-Boot 2019.01-rc3-00084-g0ce29380cf (Jan 14 2019 - 11:22:13 +0200)
> > > Allwinner Technology
> > > > >
> > > > > CPU:   Allwinner A20 (SUN7I)
> > > > > Model: Olimex A20-OLinuXino-LIME2-eMMC
> > > > > I2C:   ready
> > > > > DRAM:  1 GiB
> > > > > MMC:   mmc@1c0f000: 0, mmc@1c11000: 1
> > > > > Loading Environment from FAT... Card did not respond to voltage select!
> > > > >
> > > > > eMMC seems to be broken:
> > > > > => mmc list
> > > > > mmc@1c0f000: 0
> > > > > mmc@1c11000: 1
> > > > > => mmc dev 1
> > > > > => mmc dev 0
> > > > > MMC: no card present
> > > > > => mmc part
> > > > > MMC: no card present
> > > > > => mmc info
> > > > > MMC: no card present
> > > >
> > > > Can you try this
> > > > diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
> > > > index 33f1ec5e5a..7fab88c47f 100644
> > > > --- a/drivers/mmc/sunxi_mmc.c
> > > > +++ b/drivers/mmc/sunxi_mmc.c
> > > > @@ -648,7 +648,7 @@ static int sunxi_mmc_probe(struct udevice *dev)
> > > >         gate_reg = (void *)ccu_reg + priv->variant->gate_offset;
> > > >         setbits_le32(gate_reg, BIT(AHB_GATE_OFFSET_MMC(priv->mmc_no)));
> > > >
> > > > -       if ((!IS_ENABLED(CONFIG_MACH_SUN4I)) &&
> > > priv->variant->has_reset) {
> > > > +       if ((!IS_ENABLED(CONFIG_MACH_SUN7I)) &&
> > > priv->variant->has_reset) {
> > > >                 reset_reg = (void *)ccu_reg +
> > > priv->variant->reset_offset;
> > > >                 setbits_le32(reset_reg, BIT(priv->mmc_no +
> > > >                              priv->variant->reset_start_bit));
> > >
> > > Still fails:
> > >
> > > MMC: no card present
> > > scanning bus for devices...
> > > Found 0 device(s).
> > >
> > > Device 0: unknown device
> > >
> > > Device 0: unknown device
> > >
> > 
> > Can you print the reg values mclk and gate_reg. I have Lime2 which is fine
> > but doesn't have eMMC.
> 
> mclk0: 0x0
> gate0: 0x200c141
> mclk2: 0x0
> gate2: 0x200c541

I managed to mess it up:

XXX: mclk0: 0x80500000
XXX: gate0: 0x200c141

XXX: mclk2: 0x80500000
XXX: gate2: 0x200c541

This is what you want: 

diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 33f1ec5e5a..ac396d8d89 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -684,6 +684,9 @@ static int sunxi_mmc_probe(struct udevice *dev)
 
        upriv->mmc = &plat->mmc;
 
+    printf("XXX: mclk%d: 0x%x\n", priv->mmc_no, *priv->mclkreg);
+    printf("XXX: gate%d: 0x%x\n", priv->mmc_no, *gate_reg);
+
        /* Reset controller */
        writel(SUNXI_MMC_GCTRL_RESET, &priv->reg->gctrl);
        udelay(1000);


> 
> > 
> > -- 
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> > To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe@googlegroups.com.
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