| Message ID | e83ff2fc1c0fcdc6c435e53b1f83f1049b2a87a3.1453166915.git.alistair.francis@xilinx.com |
|---|---|
| State | New |
| Headers | show |
On 19 January 2016 at 01:33, Alistair Francis <alistair.francis@xilinx.com> wrote: > Update the GIC ID registers (registers above 0xfe0) based on the GIC > revision instead of using the sames values for all GIC implementations. > > Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> > Tested-by: Sören Brinkmann <soren.brinkmann@xilinx.com> > --- > > hw/intc/arm_gic.c | 29 ++++++++++++++++++++++++++--- > 1 file changed, 26 insertions(+), 3 deletions(-) > > diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c > index 13e297d..f6bfa53 100644 > --- a/hw/intc/arm_gic.c > +++ b/hw/intc/arm_gic.c > @@ -31,8 +31,16 @@ do { fprintf(stderr, "arm_gic: " fmt , ## __VA_ARGS__); } while (0) > #define DPRINTF(fmt, ...) do {} while(0) > #endif > > -static const uint8_t gic_id[] = { > - 0x90, 0x13, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 > +static const uint8_t gic_id_11mpcore[] = { > + 0x00, 0x00, 0x00, 0x00, 0x90, 0x13, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 > +}; > + > +static const uint8_t gic_id_gicv1[] = { > + 0x04, 0x00, 0x00, 0x00, 0x90, 0xb3, 0x1b, 0x00, 0x0d, 0xf0, 0x05, 0xb1 > +}; > + > +static const uint8_t gic_id_gicv2[] = { > + 0x04, 0x00, 0x00, 0x00, 0x90, 0xb4, 0x2b, 0x00, 0x0d, 0xf0, 0x05, 0xb1 > }; > > static inline int gic_get_current_cpu(GICState *s) > @@ -689,7 +697,22 @@ static uint32_t gic_dist_readb(void *opaque, hwaddr offset, MemTxAttrs attrs) > if (offset & 3) { > res = 0; > } else { > - res = gic_id[(offset - 0xfe0) >> 2]; > + switch (s->revision) { > + case REV_11MPCORE: > + res = gic_id_11mpcore[(offset - 0xfe0) >> 2]; > + break; > + case 1: > + res = gic_id_gicv1[(offset - 0xfe0) >> 2]; > + break; > + case 2: > + res = gic_id_gicv2[(offset - 0xfe0) >> 2]; > + break; > + case REV_NVIC: > + /* Shouldn't be able to get here */ > + abort(); > + default: > + res = 0; > + } > } > } > return res; You've expanded the arrays to include the fd0...fdc values (which is right) but the logic also needs to change to make offset == 0xfd0..0xfdf go through this code path and also to use the new indexing into the array. thanks -- PMM
On Tue, Jan 19, 2016 at 12:48 AM, Peter Maydell <peter.maydell@linaro.org> wrote: > On 19 January 2016 at 01:33, Alistair Francis > <alistair.francis@xilinx.com> wrote: >> Update the GIC ID registers (registers above 0xfe0) based on the GIC >> revision instead of using the sames values for all GIC implementations. >> >> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> >> Tested-by: Sören Brinkmann <soren.brinkmann@xilinx.com> >> --- >> >> hw/intc/arm_gic.c | 29 ++++++++++++++++++++++++++--- >> 1 file changed, 26 insertions(+), 3 deletions(-) >> >> diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c >> index 13e297d..f6bfa53 100644 >> --- a/hw/intc/arm_gic.c >> +++ b/hw/intc/arm_gic.c >> @@ -31,8 +31,16 @@ do { fprintf(stderr, "arm_gic: " fmt , ## __VA_ARGS__); } while (0) >> #define DPRINTF(fmt, ...) do {} while(0) >> #endif >> >> -static const uint8_t gic_id[] = { >> - 0x90, 0x13, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 >> +static const uint8_t gic_id_11mpcore[] = { >> + 0x00, 0x00, 0x00, 0x00, 0x90, 0x13, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 >> +}; >> + >> +static const uint8_t gic_id_gicv1[] = { >> + 0x04, 0x00, 0x00, 0x00, 0x90, 0xb3, 0x1b, 0x00, 0x0d, 0xf0, 0x05, 0xb1 >> +}; >> + >> +static const uint8_t gic_id_gicv2[] = { >> + 0x04, 0x00, 0x00, 0x00, 0x90, 0xb4, 0x2b, 0x00, 0x0d, 0xf0, 0x05, 0xb1 >> }; >> >> static inline int gic_get_current_cpu(GICState *s) >> @@ -689,7 +697,22 @@ static uint32_t gic_dist_readb(void *opaque, hwaddr offset, MemTxAttrs attrs) >> if (offset & 3) { >> res = 0; >> } else { >> - res = gic_id[(offset - 0xfe0) >> 2]; >> + switch (s->revision) { >> + case REV_11MPCORE: >> + res = gic_id_11mpcore[(offset - 0xfe0) >> 2]; >> + break; >> + case 1: >> + res = gic_id_gicv1[(offset - 0xfe0) >> 2]; >> + break; >> + case 2: >> + res = gic_id_gicv2[(offset - 0xfe0) >> 2]; >> + break; >> + case REV_NVIC: >> + /* Shouldn't be able to get here */ >> + abort(); >> + default: >> + res = 0; >> + } >> } >> } >> return res; > > You've expanded the arrays to include the fd0...fdc values > (which is right) but the logic also needs to change to > make offset == 0xfd0..0xfdf go through this code path and > also to use the new indexing into the array. I see what you mean, fixing it now. Thanks, Alistair > > thanks > -- PMM >
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 13e297d..f6bfa53 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -31,8 +31,16 @@ do { fprintf(stderr, "arm_gic: " fmt , ## __VA_ARGS__); } while (0) #define DPRINTF(fmt, ...) do {} while(0) #endif -static const uint8_t gic_id[] = { - 0x90, 0x13, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 +static const uint8_t gic_id_11mpcore[] = { + 0x00, 0x00, 0x00, 0x00, 0x90, 0x13, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 +}; + +static const uint8_t gic_id_gicv1[] = { + 0x04, 0x00, 0x00, 0x00, 0x90, 0xb3, 0x1b, 0x00, 0x0d, 0xf0, 0x05, 0xb1 +}; + +static const uint8_t gic_id_gicv2[] = { + 0x04, 0x00, 0x00, 0x00, 0x90, 0xb4, 0x2b, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; static inline int gic_get_current_cpu(GICState *s) @@ -689,7 +697,22 @@ static uint32_t gic_dist_readb(void *opaque, hwaddr offset, MemTxAttrs attrs) if (offset & 3) { res = 0; } else { - res = gic_id[(offset - 0xfe0) >> 2]; + switch (s->revision) { + case REV_11MPCORE: + res = gic_id_11mpcore[(offset - 0xfe0) >> 2]; + break; + case 1: + res = gic_id_gicv1[(offset - 0xfe0) >> 2]; + break; + case 2: + res = gic_id_gicv2[(offset - 0xfe0) >> 2]; + break; + case REV_NVIC: + /* Shouldn't be able to get here */ + abort(); + default: + res = 0; + } } } return res;