| Message ID | cover.1387160489.git.peter.crosthwaite@xilinx.com |
|---|---|
| State | New |
| Headers | show |
On 16 December 2013 02:28, Peter Crosthwaite <peter.crosthwaite@xilinx.com> wrote: > Hi All, > > This patch series adds support for two board configurable ARM CPU > properties - Configuration Base Address Register and the > hivecs-on-reset. > > The CBAR is needed to fix Zynq and Highbank which both were broken for > linux boot. This series provides the fixes. > > I have added these properties as qdev properties rather than object > properties to pick up the desired writable-until-realize semantic. Looks good to me, thanks. Applied all to target-arm.next. thanks -- PMM
diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index c75b425..905483d 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -236,13 +236,13 @@ static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine) cpu = ARM_CPU(object_new(object_class_get_name(oc))); - object_property_set_int(OBJECT(cpu), MPCORE_PERIPHBASE, "reset-cbar", - &err); + object_property_set_bool(OBJECT(cpu), true, "realized", &err); if (err) { error_report("%s", error_get_pretty(err)); exit(1); } - object_property_set_bool(OBJECT(cpu), true, "realized", &err); + object_property_set_int(OBJECT(cpu), MPCORE_PERIPHBASE, "reset-cbar", + &err); if (err) { error_report("%s", error_get_pretty(err));
Hi All, This patch series adds support for two board configurable ARM CPU properties - Configuration Base Address Register and the hivecs-on-reset. The CBAR is needed to fix Zynq and Highbank which both were broken for linux boot. This series provides the fixes. I have added these properties as qdev properties rather than object properties to pick up the desired writable-until-realize semantic. To test the semantics of these new qdev properties I hacked Highbank to illegally set the property after realize: exit(1); Booting with this bug I now get: $ qemu-system-arm -M highbank ... qemu-system-arm: Attempt to set property 'reset-cbar' on anonymous device (type 'cortex-a9-arm-cpu') after it was realized whereas the previous versions would have silent failed. Regards, Peter changed since v4: Reimplemented using qdev properties dropped QOM patches rebased against mainline changed since v3: Rebased against target-arm patch queue (2013/12/11) Added Antonys reset hivecs patches changed since v2: Fixed comment in p8 (PMM review) Enabled CBAR for a15 (PMM review) Typo sweep Changed since v1: Fix QOM to support writeable dynamic properties Use dynamic props instead (PMM/AF discussion) Use error_report (AF reivew) Use reset- prefix on propname (AF review) Fix machine model namings or the MPCore PERIPHBASE Antony Pavlov (2): ARM: cpu: add "reset_hivecs" property ARM: arm_cpu_reset: make it possible to use high vectors for reset_exc Peter Crosthwaite (8): target-arm/helper.c: Allow cp15.c15 dummy override target-arm: Define and use ARM_FEATURE_CBAR target-arm/cpu: Convert reset CBAR to a property arm/highbank: Use object_new() rather than cpu_arm_init() arm/highbank: Fix CBAR initialisation arm/xilinx_zynq: Use object_new() rather than cpu_arm_init() arm/xilinx_zynq: Implement CBAR initialisation arm/highbank.c: Fix MPCore periphbase name hw/arm/highbank.c | 33 +++++++++++++++++++++------------ hw/arm/xilinx_zynq.c | 21 +++++++++++++++++---- target-arm/cpu-qom.h | 1 + target-arm/cpu.c | 47 ++++++++++++++++++++++++++++++++++++++--------- target-arm/cpu.h | 1 + target-arm/helper.c | 12 +++++++++++- 6 files changed, 89 insertions(+), 26 deletions(-)