diff mbox

ARM: BKPT instructions should raise prefetch aborts with IFSR type 00010

Message ID 4DD398CE.9040603@sysgo.com
State New
Headers show

Commit Message

Alex Zuepke May 18, 2011, 10 a.m. UTC
Hi,

Peter Maydell schrieb:
> On 25 March 2011 10:54, Alex Zuepke <azuepke@sysgo.com> wrote:
>> while digging through some problems with BKPT exceptions on ARM, I
>> discovered that QEMU does not update IFSR on prefetch aborts. This
>> should be done since ARMv6 according to ARM docs. Please include.
> 
> This patch is the wrong approach to fixing this bug -- the
> updating of the IFSR needs to be done when the exception
> is taken, not when we translate the breakpoint instruction.
> 
> I'll put this on my todo list. If you happen to have a convenient
> test case demonstrating the problem, that would make a fix happen
> faster ;-)
> 
> -- PMM

I tried to fix it, new patch attached.
But I'm not sure if it is required for semihosting as well.

On ARMv7-M bkpt works differently, and debug registers aren't
implemented yet, so I didn't touch it.

Best Regards,
Alex

Comments

Peter Maydell May 18, 2011, 5:44 p.m. UTC | #1
On 18 May 2011 11:00, Alex Zuepke <azuepke@sysgo.com> wrote:
> Peter Maydell schrieb:
>> On 25 March 2011 10:54, Alex Zuepke <azuepke@sysgo.com> wrote:
>>> while digging through some problems with BKPT exceptions on ARM, I
>>> discovered that QEMU does not update IFSR on prefetch aborts. This
>>> should be done since ARMv6 according to ARM docs. Please include.

> I tried to fix it, new patch attached.

Thanks. I've looked at it and given it a quick test; I'm
happy with this version.

> But I'm not sure if it is required for semihosting as well.

I think the value of IFSR is not defined after a semihosting
request (different implementations might use an actual SVC handler
or might intercept the SVC before it becomes an actual CPU SVC
exception). For QEMU we handle the semihosting request and
return immediately rather than actually delivering a CPU exception,
so I think it makes sense not to set IFSR in that case.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

-- PMM
Aurelien Jarno June 3, 2011, 4:42 p.m. UTC | #2
On Wed, May 18, 2011 at 12:00:46PM +0200, Alex Zuepke wrote:
> Hi,
> 
> Peter Maydell schrieb:
> > On 25 March 2011 10:54, Alex Zuepke <azuepke@sysgo.com> wrote:
> >> while digging through some problems with BKPT exceptions on ARM, I
> >> discovered that QEMU does not update IFSR on prefetch aborts. This
> >> should be done since ARMv6 according to ARM docs. Please include.
> > 
> > This patch is the wrong approach to fixing this bug -- the
> > updating of the IFSR needs to be done when the exception
> > is taken, not when we translate the breakpoint instruction.
> > 
> > I'll put this on my todo list. If you happen to have a convenient
> > test case demonstrating the problem, that would make a fix happen
> > faster ;-)
> > 
> > -- PMM
> 
> I tried to fix it, new patch attached.
> But I'm not sure if it is required for semihosting as well.
> 
> On ARMv7-M bkpt works differently, and debug registers aren't
> implemented yet, so I didn't touch it.
> 

Thanks, applied. In the future, could you please send the patch inline,
or at least attach a patch that can be applied with git am?
diff mbox

Patch

 target-arm: BKPT instructions should raise prefetch aborts with IFSR type 00010
 diff against qemu 0.14.1
 Signed-off-by: Alex Zuepke <azuepke@sysgo.com>
diff --git a/target-arm/helper.c b/target-arm/helper.c
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -847,6 +849,7 @@  void do_interrupt(CPUARMState *env)
                 return;
             }
         }
+        env->cp15.c5_insn = 2;
         /* Fall through to prefetch abort.  */
     case EXCP_PREFETCH_ABORT:
         new_mode = ARM_CPU_MODE_ABT;