diff mbox series

[2/2] hw/intc/arm_gicv3_its: Use send_msi in the GITS_TRANSLATER write

Message ID 20240221173325.1494895-3-nabihestefan@google.com
State New
Headers show
Series ARM GICv3 ITS DeviceID modification implementation | expand

Commit Message

Nabih Estefan Feb. 21, 2024, 5:33 p.m. UTC 
From: Roque Arcudia Hernandez <roqueh@google.com>

This is trying to achieve 2 things: To be able to redefine the send_msi in a
derived class of arm_gicv3_its and/or to expose a method call interface to
inject interrupts from another device.

Signed-off-by: Roque Arcudia Hernandez <roqueh@google.com>
Signed-off-by: Nabih Estefan <nabihestefan@google.com>
---
 hw/intc/arm_gicv3_its.c                | 20 +++++++++-----------
 include/hw/intc/arm_gicv3_its_common.h | 13 +++++++++++--
 2 files changed, 20 insertions(+), 13 deletions(-)

Comments

Peter Maydell Feb. 23, 2024, 3:23 p.m. UTC | #1 
On Wed, 21 Feb 2024 at 17:33, Nabih Estefan <nabihestefan@google.com> wrote:
>
> From: Roque Arcudia Hernandez <roqueh@google.com>
>
> This is trying to achieve 2 things: To be able to redefine the send_msi in a
> derived class of arm_gicv3_its and/or to expose a method call interface to
> inject interrupts from another device.

But there is no such derived class, so what's the purpose of
this infrastructure? If you have a specific device model you want
to upstream that uses this, you should include this in the patchset
adding that device model, so that we have the context to see what
the change is trying to and whether it's the best way to do it.

thanks
-- PMM
diff mbox series

Patch

diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
index 52e9aca9c6..9342e96be3 100644
--- a/hw/intc/arm_gicv3_its.c
+++ b/hw/intc/arm_gicv3_its.c
@@ -20,16 +20,6 @@ 
 #include "qom/object.h"
 #include "qapi/error.h"
 
-typedef struct GICv3ITSClass GICv3ITSClass;
-/* This is reusing the GICv3ITSState typedef from ARM_GICV3_ITS_COMMON */
-DECLARE_OBJ_CHECKERS(GICv3ITSState, GICv3ITSClass,
-                     ARM_GICV3_ITS, TYPE_ARM_GICV3_ITS)
-
-struct GICv3ITSClass {
-    GICv3ITSCommonClass parent_class;
-    ResettablePhases parent_phases;
-};
-
 /*
  * This is an internal enum used to distinguish between LPI triggered
  * via command queue and LPI triggered via gits_translater write.
@@ -1561,7 +1551,8 @@  static MemTxResult gicv3_its_translation_write(void *opaque, hwaddr offset,
     switch (offset) {
     case GITS_TRANSLATER:
         if (s->ctlr & R_GITS_CTLR_ENABLED_MASK) {
-            result = do_process_its_cmd(s, attrs.requester_id, data, NONE);
+            GICv3ITSCommonClass *c = ARM_GICV3_ITS_COMMON_GET_CLASS(s);
+            result = c->send_msi(s, data, attrs.requester_id);
         }
         break;
     default:
@@ -1994,6 +1985,12 @@  static void gicv3_its_reset_hold(Object *obj)
     }
 }
 
+static int gicv3_its_send_msi(GICv3ITSState *s, uint32_t eventid,
+                              uint32_t devid)
+{
+    return do_process_its_cmd(s, devid, eventid, NONE);
+}
+
 static void gicv3_its_post_load(GICv3ITSState *s)
 {
     if (s->ctlr & R_GITS_CTLR_ENABLED_MASK) {
@@ -2020,6 +2017,7 @@  static void gicv3_its_class_init(ObjectClass *klass, void *data)
     resettable_class_set_parent_phases(rc, NULL, gicv3_its_reset_hold, NULL,
                                        &ic->parent_phases);
     icc->post_load = gicv3_its_post_load;
+    icc->send_msi = gicv3_its_send_msi;
 }
 
 static const TypeInfo gicv3_its_info = {
diff --git a/include/hw/intc/arm_gicv3_its_common.h b/include/hw/intc/arm_gicv3_its_common.h
index e072c36cca..c81bd0b26e 100644
--- a/include/hw/intc/arm_gicv3_its_common.h
+++ b/include/hw/intc/arm_gicv3_its_common.h
@@ -25,8 +25,6 @@ 
 #include "hw/intc/arm_gicv3_common.h"
 #include "qom/object.h"
 
-#define TYPE_ARM_GICV3_ITS "arm-gicv3-its"
-
 #define ITS_CONTROL_SIZE 0x10000
 #define ITS_TRANS_SIZE   0x10000
 #define ITS_SIZE         (ITS_CONTROL_SIZE + ITS_TRANS_SIZE)
@@ -132,4 +130,15 @@  struct GICv3ITSCommonClass {
  */
 const char *its_class_name(void);
 
+#define TYPE_ARM_GICV3_ITS "arm-gicv3-its"
+typedef struct GICv3ITSClass GICv3ITSClass;
+/* This is reusing the GICv3ITSState typedef from ARM_GICV3_ITS_COMMON */
+DECLARE_OBJ_CHECKERS(GICv3ITSState, GICv3ITSClass,
+                     ARM_GICV3_ITS, TYPE_ARM_GICV3_ITS)
+
+struct GICv3ITSClass {
+    GICv3ITSCommonClass parent_class;
+    ResettablePhases parent_phases;
+};
+
 #endif