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[v2,04/11] target/riscv: remove RISCV_FEATURE_MISA

Message ID 20230214192356.319991-5-dbarboza@ventanamicro.com
State New
Headers show
Series enable write_misa() and RISCV_FEATURE_* cleanups | expand

Commit Message

Daniel Henrique Barboza Feb. 14, 2023, 7:23 p.m. UTC 
This enum is no longer used after write_misa() started reading the value
from cpu->cfg.misa_w.

Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
 target/riscv/cpu.h | 1 -
 1 file changed, 1 deletion(-)
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Patch

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index fe572b83e9..00a464c9c4 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -89,7 +89,6 @@  enum {
     RISCV_FEATURE_MMU,
     RISCV_FEATURE_PMP,
     RISCV_FEATURE_EPMP,
-    RISCV_FEATURE_MISA,
     RISCV_FEATURE_DEBUG
 };