@@ -39,8 +39,8 @@ static void aw_a10_init(Object *obj)
{
AwA10State *s = AW_A10(obj);
- object_initialize_child(obj, "cpu", &s->cpu,
- ARM_CPU_TYPE_NAME("cortex-a8"));
+ s->cpu = ARM_CPU(object_new(ARM_CPU_TYPE_NAME("cortex-a8")));
+ object_property_add_child(obj, "cpu", OBJECT(s->cpu));
object_initialize_child(obj, "intc", &s->intc, TYPE_AW_A10_PIC);
@@ -71,7 +71,7 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
AwA10State *s = AW_A10(dev);
SysBusDevice *sysbusdev;
- if (!qdev_realize(DEVICE(&s->cpu), NULL, errp)) {
+ if (!qdev_realize(DEVICE(s->cpu), NULL, errp)) {
return;
}
@@ -81,9 +81,9 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
sysbusdev = SYS_BUS_DEVICE(&s->intc);
sysbus_mmio_map(sysbusdev, 0, AW_A10_PIC_REG_BASE);
sysbus_connect_irq(sysbusdev, 0,
- qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
+ qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ));
sysbus_connect_irq(sysbusdev, 1,
- qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
+ qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_FIQ));
qdev_pass_gpios(DEVICE(&s->intc), dev, NULL);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer), errp)) {
@@ -192,8 +192,8 @@ static void allwinner_h3_init(Object *obj)
s->memmap = allwinner_h3_memmap;
for (int i = 0; i < AW_H3_NUM_CPUS; i++) {
- object_initialize_child(obj, "cpu[*]", &s->cpus[i],
- ARM_CPU_TYPE_NAME("cortex-a7"));
+ s->cpus[i] = ARM_CPU(object_new(ARM_CPU_TYPE_NAME("cortex-a7")));
+ object_property_add_child(obj, "cpu[*]", OBJECT(s->cpus[i]));
}
object_initialize_child(obj, "gic", &s->gic, TYPE_ARM_GIC);
@@ -239,15 +239,15 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp)
* Disable secondary CPUs. Guest EL3 firmware will start
* them via CPU reset control registers.
*/
- qdev_prop_set_bit(DEVICE(&s->cpus[i]), "start-powered-off",
+ qdev_prop_set_bit(DEVICE(s->cpus[i]), "start-powered-off",
i > 0);
/* All exception levels required */
- qdev_prop_set_bit(DEVICE(&s->cpus[i]), "has_el3", true);
- qdev_prop_set_bit(DEVICE(&s->cpus[i]), "has_el2", true);
+ qdev_prop_set_bit(DEVICE(s->cpus[i]), "has_el3", true);
+ qdev_prop_set_bit(DEVICE(s->cpus[i]), "has_el2", true);
/* Mark realized */
- qdev_realize(DEVICE(&s->cpus[i]), NULL, &error_fatal);
+ qdev_realize(DEVICE(s->cpus[i]), NULL, &error_fatal);
}
/* Generic Interrupt Controller */
@@ -270,7 +270,7 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp)
* and the GIC's IRQ/FIQ/VIRQ/VFIQ interrupt outputs to the CPU's inputs.
*/
for (i = 0; i < AW_H3_NUM_CPUS; i++) {
- DeviceState *cpudev = DEVICE(&s->cpus[i]);
+ DeviceState *cpudev = DEVICE(s->cpus[i]);
int ppibase = AW_H3_GIC_NUM_SPI + i * GIC_INTERNAL + GIC_NR_SGIS;
int irq;
/*
@@ -96,7 +96,7 @@ static void cubieboard_init(MachineState *machine)
/* TODO create and connect IDE devices for ide_drive_get() */
cubieboard_binfo.ram_size = machine->ram_size;
- arm_load_kernel(&a10->cpu, machine, &cubieboard_binfo);
+ arm_load_kernel(a10->cpu, machine, &cubieboard_binfo);
}
static void cubieboard_machine_init(MachineClass *mc)
@@ -14,8 +14,6 @@ arm_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m.c'))
arm_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210.c'))
arm_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx.c', 'pxa2xx_gpio.c', 'pxa2xx_pic.c'))
arm_ss.add(when: 'CONFIG_OMAP', if_true: files('omap1.c', 'omap2.c'))
-arm_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('allwinner-a10.c', 'cubieboard.c'))
-arm_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3.c', 'orangepi.c'))
arm_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2836.c', 'raspi.c'))
arm_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp.c', 'xlnx-zcu102.c'))
arm_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal.c', 'xlnx-versal-virt.c'))
@@ -27,6 +25,8 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'fby35.c'))
arm_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c'))
+softmmu_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('allwinner-a10.c', 'cubieboard.c'))
+softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3.c', 'orangepi.c'))
softmmu_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmu-common.c'))
softmmu_ss.add(when: 'CONFIG_ARMSSE', if_true: files('armsse.c'))
softmmu_ss.add(when: 'CONFIG_CHEETAH', if_true: files('palm.c'))
@@ -13,8 +13,8 @@
#include "hw/usb/hcd-ohci.h"
#include "hw/usb/hcd-ehci.h"
#include "hw/rtc/allwinner-rtc.h"
+#include "hw/arm/cpu.h"
-#include "target/arm/cpu.h"
#include "qom/object.h"
@@ -30,7 +30,7 @@ struct AwA10State {
DeviceState parent_obj;
/*< public >*/
- ARMCPU cpu;
+ ARMCPU *cpu;
AwA10PITState timer;
AwA10PICState intc;
AwEmacState emac;
@@ -47,7 +47,7 @@
#include "hw/sd/allwinner-sdhost.h"
#include "hw/net/allwinner-sun8i-emac.h"
#include "hw/rtc/allwinner-rtc.h"
-#include "target/arm/cpu.h"
+#include "hw/arm/cpu.h"
#include "sysemu/block-backend.h"
/**
@@ -121,7 +121,7 @@ struct AwH3State {
DeviceState parent_obj;
/*< public >*/
- ARMCPU cpus[AW_H3_NUM_CPUS];
+ ARMCPU *cpus[AW_H3_NUM_CPUS];
const hwaddr *memmap;
AwA10PITState timer;
AwH3ClockCtlState ccu;
Replace the ARMCPU field in both AwA10State / AwH3State by a reference to an allocated ARMCPU. Instead of initializing the field with object_initialize(), allocate it with object_new(). As we don't access ARMCPU internal fields or size, we can move from arm_ss[] to the more generic softmmu_ss[] the followin units: - allwinner-a10.c - allwinner-h3.c - cubieboard.c - orangepi.c Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- hw/arm/allwinner-a10.c | 10 +++++----- hw/arm/allwinner-h3.c | 14 +++++++------- hw/arm/cubieboard.c | 2 +- hw/arm/meson.build | 4 ++-- include/hw/arm/allwinner-a10.h | 4 ++-- include/hw/arm/allwinner-h3.h | 4 ++-- 6 files changed, 19 insertions(+), 19 deletions(-)