| Message ID | 20211015061138.3766862-2-frank.chang@sifive.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v3,1/2] softfloat: add APIs to handle alternative sNaN propagation for fmax/fmin | expand |
<frank.chang@sifive.com> 於 2021年10月15日 週五 下午2:12寫道： > From: Chih-Min Chao <chihmin.chao@sifive.com> > > The sNaN propagation behavior has been changed since > cd20cee7 in https://github.com/riscv/riscv-isa-manual > > Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> > --- > target/riscv/fpu_helper.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c > index 8700516a14c..1472ead2528 100644 > --- a/target/riscv/fpu_helper.c > +++ b/target/riscv/fpu_helper.c > @@ -174,14 +174,14 @@ uint64_t helper_fmin_s(CPURISCVState *env, uint64_t > rs1, uint64_t rs2) > { > float32 frs1 = check_nanbox_s(rs1); > float32 frs2 = check_nanbox_s(rs2); > - return nanbox_s(float32_minnum(frs1, frs2, &env->fp_status)); > + return nanbox_s(float32_minnum_noprop(frs1, frs2, &env->fp_status)); > } > > uint64_t helper_fmax_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) > { > float32 frs1 = check_nanbox_s(rs1); > float32 frs2 = check_nanbox_s(rs2); > - return nanbox_s(float32_maxnum(frs1, frs2, &env->fp_status)); > + return nanbox_s(float32_maxnum_noprop(frs1, frs2, &env->fp_status)); > } > > uint64_t helper_fsqrt_s(CPURISCVState *env, uint64_t rs1) > @@ -283,12 +283,12 @@ uint64_t helper_fdiv_d(CPURISCVState *env, uint64_t > frs1, uint64_t frs2) > > uint64_t helper_fmin_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2) > { > - return float64_minnum(frs1, frs2, &env->fp_status); > + return float64_minnum_noprop(frs1, frs2, &env->fp_status); > } > > uint64_t helper_fmax_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2) > { > - return float64_maxnum(frs1, frs2, &env->fp_status); > + return float64_maxnum_noprop(frs1, frs2, &env->fp_status); > } > > uint64_t helper_fcvt_s_d(CPURISCVState *env, uint64_t rs1) > -- > 2.25.1 > > > I should add the cover letter for this series of patchset, will resend it. Sorry for the confusion. Regards, Frank Chang
diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c index 8700516a14c..1472ead2528 100644 --- a/target/riscv/fpu_helper.c +++ b/target/riscv/fpu_helper.c @@ -174,14 +174,14 @@ uint64_t helper_fmin_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { float32 frs1 = check_nanbox_s(rs1); float32 frs2 = check_nanbox_s(rs2); - return nanbox_s(float32_minnum(frs1, frs2, &env->fp_status)); + return nanbox_s(float32_minnum_noprop(frs1, frs2, &env->fp_status)); } uint64_t helper_fmax_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { float32 frs1 = check_nanbox_s(rs1); float32 frs2 = check_nanbox_s(rs2); - return nanbox_s(float32_maxnum(frs1, frs2, &env->fp_status)); + return nanbox_s(float32_maxnum_noprop(frs1, frs2, &env->fp_status)); } uint64_t helper_fsqrt_s(CPURISCVState *env, uint64_t rs1) @@ -283,12 +283,12 @@ uint64_t helper_fdiv_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2) uint64_t helper_fmin_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2) { - return float64_minnum(frs1, frs2, &env->fp_status); + return float64_minnum_noprop(frs1, frs2, &env->fp_status); } uint64_t helper_fmax_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2) { - return float64_maxnum(frs1, frs2, &env->fp_status); + return float64_maxnum_noprop(frs1, frs2, &env->fp_status); } uint64_t helper_fcvt_s_d(CPURISCVState *env, uint64_t rs1)