[1/3] target-arm: Correct misleading 'is_thumb' syn_* parameter names

In syndrome register values, the IL bit indicates the instruction
length, and is 1 for 4-byte instructions and 0 for 2-byte
instructions. All A64 and A32 instructions are 4-byte, but
Thumb instructions may be either 2 or 4 bytes long. Unfortunately
we named the parameter to the syn_* functions for constructing
syndromes "is_thumb", which falsely implies that it should be
set for all Thumb instructions, rather than only the 16-bit ones.
Fix the functions to name the parameter 'is_16bit' instead.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target-arm/internals.h | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

On 05.02.2016 17:37, Peter Maydell wrote:
> In syndrome register values, the IL bit indicates the instruction
> length, and is 1 for 4-byte instructions and 0 for 2-byte
> instructions. All A64 and A32 instructions are 4-byte, but
> Thumb instructions may be either 2 or 4 bytes long. Unfortunately
> we named the parameter to the syn_* functions for constructing
> syndromes "is_thumb", which falsely implies that it should be
> set for all Thumb instructions, rather than only the 16-bit ones.
> Fix the functions to name the parameter 'is_16bit' instead.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>

> ---
>  target-arm/internals.h | 28 ++++++++++++++--------------
>  1 file changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/target-arm/internals.h b/target-arm/internals.h
> index d226bbe..a648c1e 100644
> --- a/target-arm/internals.h
> +++ b/target-arm/internals.h
> @@ -270,10 +270,10 @@ static inline uint32_t syn_aa64_smc(uint32_t imm16)
>      return (EC_AA64_SMC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff);
>  }
>  
> -static inline uint32_t syn_aa32_svc(uint32_t imm16, bool is_thumb)
> +static inline uint32_t syn_aa32_svc(uint32_t imm16, bool is_16bit)
>  {
>      return (EC_AA32_SVC << ARM_EL_EC_SHIFT) | (imm16 & 0xffff)
> -        | (is_thumb ? 0 : ARM_EL_IL);
> +        | (is_16bit ? 0 : ARM_EL_IL);
>  }
>  
>  static inline uint32_t syn_aa32_hvc(uint32_t imm16)
> @@ -291,10 +291,10 @@ static inline uint32_t syn_aa64_bkpt(uint32_t imm16)
>      return (EC_AA64_BKPT << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff);
>  }
>  
> -static inline uint32_t syn_aa32_bkpt(uint32_t imm16, bool is_thumb)
> +static inline uint32_t syn_aa32_bkpt(uint32_t imm16, bool is_16bit)
>  {
>      return (EC_AA32_BKPT << ARM_EL_EC_SHIFT) | (imm16 & 0xffff)
> -        | (is_thumb ? 0 : ARM_EL_IL);
> +        | (is_16bit ? 0 : ARM_EL_IL);
>  }
>  
>  static inline uint32_t syn_aa64_sysregtrap(int op0, int op1, int op2,
> @@ -308,48 +308,48 @@ static inline uint32_t syn_aa64_sysregtrap(int op0, int op1, int op2,
>  
>  static inline uint32_t syn_cp14_rt_trap(int cv, int cond, int opc1, int opc2,
>                                          int crn, int crm, int rt, int isread,
> -                                        bool is_thumb)
> +                                        bool is_16bit)
>  {
>      return (EC_CP14RTTRAP << ARM_EL_EC_SHIFT)
> -        | (is_thumb ? 0 : ARM_EL_IL)
> +        | (is_16bit ? 0 : ARM_EL_IL)
>          | (cv << 24) | (cond << 20) | (opc2 << 17) | (opc1 << 14)
>          | (crn << 10) | (rt << 5) | (crm << 1) | isread;
>  }
>  
>  static inline uint32_t syn_cp15_rt_trap(int cv, int cond, int opc1, int opc2,
>                                          int crn, int crm, int rt, int isread,
> -                                        bool is_thumb)
> +                                        bool is_16bit)
>  {
>      return (EC_CP15RTTRAP << ARM_EL_EC_SHIFT)
> -        | (is_thumb ? 0 : ARM_EL_IL)
> +        | (is_16bit ? 0 : ARM_EL_IL)
>          | (cv << 24) | (cond << 20) | (opc2 << 17) | (opc1 << 14)
>          | (crn << 10) | (rt << 5) | (crm << 1) | isread;
>  }
>  
>  static inline uint32_t syn_cp14_rrt_trap(int cv, int cond, int opc1, int crm,
>                                           int rt, int rt2, int isread,
> -                                         bool is_thumb)
> +                                         bool is_16bit)
>  {
>      return (EC_CP14RRTTRAP << ARM_EL_EC_SHIFT)
> -        | (is_thumb ? 0 : ARM_EL_IL)
> +        | (is_16bit ? 0 : ARM_EL_IL)
>          | (cv << 24) | (cond << 20) | (opc1 << 16)
>          | (rt2 << 10) | (rt << 5) | (crm << 1) | isread;
>  }
>  
>  static inline uint32_t syn_cp15_rrt_trap(int cv, int cond, int opc1, int crm,
>                                           int rt, int rt2, int isread,
> -                                         bool is_thumb)
> +                                         bool is_16bit)
>  {
>      return (EC_CP15RRTTRAP << ARM_EL_EC_SHIFT)
> -        | (is_thumb ? 0 : ARM_EL_IL)
> +        | (is_16bit ? 0 : ARM_EL_IL)
>          | (cv << 24) | (cond << 20) | (opc1 << 16)
>          | (rt2 << 10) | (rt << 5) | (crm << 1) | isread;
>  }
>  
> -static inline uint32_t syn_fp_access_trap(int cv, int cond, bool is_thumb)
> +static inline uint32_t syn_fp_access_trap(int cv, int cond, bool is_16bit)
>  {
>      return (EC_ADVSIMDFPACCESSTRAP << ARM_EL_EC_SHIFT)
> -        | (is_thumb ? 0 : ARM_EL_IL)
> +        | (is_16bit ? 0 : ARM_EL_IL)
>          | (cv << 24) | (cond << 20);
>  }
>