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[v5,35/37] target-arm: Make Cortex-A15 CBAR read-only

Message ID 1396023024-2262-36-git-send-email-peter.maydell@linaro.org
State New
Headers show

Commit Message

Peter Maydell March 28, 2014, 4:10 p.m. UTC 
The Cortex-A15's CBAR register is actually read-only (unlike that
of the Cortex-A9). Correct our model to match the hardware.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target-arm/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Peter Crosthwaite April 4, 2014, 5:33 a.m. UTC | #1 
On Sat, Mar 29, 2014 at 2:10 AM, Peter Maydell <peter.maydell@linaro.org> wrote:
> The Cortex-A15's CBAR register is actually read-only (unlike that
> of the Cortex-A9). Correct our model to match the hardware.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

> ---
>  target-arm/cpu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target-arm/cpu.c b/target-arm/cpu.c
> index f9f6187..c0ddc3e 100644
> --- a/target-arm/cpu.c
> +++ b/target-arm/cpu.c
> @@ -744,7 +744,7 @@ static void cortex_a15_initfn(Object *obj)
>      set_feature(&cpu->env, ARM_FEATURE_ARM_DIV);
>      set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER);
>      set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
> -    set_feature(&cpu->env, ARM_FEATURE_CBAR);
> +    set_feature(&cpu->env, ARM_FEATURE_CBAR_RO);
>      set_feature(&cpu->env, ARM_FEATURE_LPAE);
>      cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15;
>      cpu->midr = 0x412fc0f1;
> --
> 1.9.0
>
>
diff mbox

Patch

diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index f9f6187..c0ddc3e 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -744,7 +744,7 @@  static void cortex_a15_initfn(Object *obj)
     set_feature(&cpu->env, ARM_FEATURE_ARM_DIV);
     set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER);
     set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
-    set_feature(&cpu->env, ARM_FEATURE_CBAR);
+    set_feature(&cpu->env, ARM_FEATURE_CBAR_RO);
     set_feature(&cpu->env, ARM_FEATURE_LPAE);
     cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15;
     cpu->midr = 0x412fc0f1;