| Message ID | 1377768833-11400-2-git-send-email-antonynpavlov@gmail.com |
|---|---|
| State | New |
| Headers | show |
On 29 August 2013 10:33, Antony Pavlov <antonynpavlov@gmail.com> wrote: > This is slightly altered version of ARM946E-S CPU code > from EOS QEMU (Magic Lantern project) so nearly all > credits go to @a1ex. > > ARM946E-S Technical Reference Manual can be found here: > http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0201d/index.html I think the CPU we label "arm946" *is* an ARM946E-S -- there's no other TRM or variant of the 946 listed on the ARM website. If we're inaccurate about something we should just fix it (and that should be safe since there's no existing board model which uses the 946). -- PMM
On Thu, 29 Aug 2013 11:44:38 +0100 Peter Maydell <peter.maydell@linaro.org> wrote: > On 29 August 2013 10:33, Antony Pavlov <antonynpavlov@gmail.com> wrote: > > This is slightly altered version of ARM946E-S CPU code > > from EOS QEMU (Magic Lantern project) so nearly all > > credits go to @a1ex. > > > > ARM946E-S Technical Reference Manual can be found here: > > http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0201d/index.html > > I think the CPU we label "arm946" *is* an ARM946E-S -- there's > no other TRM or variant of the 946 listed on the ARM website. > If we're inaccurate about something we should just fix it (and > that should be safe since there's no existing board model which > uses the 946). Thanks! I'll take a look. -- Best regards, Antony Pavlov
On Thu, 29 Aug 2013 11:44:38 +0100 Peter Maydell <peter.maydell@linaro.org> wrote: > On 29 August 2013 10:33, Antony Pavlov <antonynpavlov@gmail.com> wrote: > > This is slightly altered version of ARM946E-S CPU code > > from EOS QEMU (Magic Lantern project) so nearly all > > credits go to @a1ex. > > > > ARM946E-S Technical Reference Manual can be found here: > > http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0201d/index.html > > I think the CPU we label "arm946" *is* an ARM946E-S -- there's > no other TRM or variant of the 946 listed on the ARM website. > If we're inaccurate about something we should just fix it (and > that should be safe since there's no existing board model which > uses the 946). I have just run barebox on conventional "arm946" qemu CPU. It works fine. IMHO just now we can drop this patch. If Magic Lantern or CHDK need some specific initial CPU CP15 register state then we can fix it in the platform code without defining new CPU type. Any comments? -- Best regards, Antony Pavlov
On Fri, Aug 30, 2013 at 4:17 AM, Antony Pavlov <antonynpavlov@gmail.com> wrote: > On Thu, 29 Aug 2013 11:44:38 +0100 > Peter Maydell <peter.maydell@linaro.org> wrote: > >> On 29 August 2013 10:33, Antony Pavlov <antonynpavlov@gmail.com> wrote: >> > This is slightly altered version of ARM946E-S CPU code >> > from EOS QEMU (Magic Lantern project) so nearly all >> > credits go to @a1ex. >> > >> > ARM946E-S Technical Reference Manual can be found here: >> > http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0201d/index.html >> >> I think the CPU we label "arm946" *is* an ARM946E-S -- there's >> no other TRM or variant of the 946 listed on the ARM website. >> If we're inaccurate about something we should just fix it (and >> that should be safe since there's no existing board model which >> uses the 946). > > I have just run barebox on conventional "arm946" qemu CPU. It works fine. > IMHO just now we can drop this patch. > > If Magic Lantern or CHDK need some specific initial CPU CP15 register state > then we can fix it in the platform code without defining new CPU type. > > Any comments? Object properties the solution? Regards, Peter > > -- > Best regards, > Antony Pavlov >
On 30 August 2013 06:09, Peter Crosthwaite <peter.crosthwaite@xilinx.com> wrote: > On Fri, Aug 30, 2013 at 4:17 AM, Antony Pavlov <antonynpavlov@gmail.com> wrote: >> If Magic Lantern or CHDK need some specific initial CPU CP15 register state >> then we can fix it in the platform code without defining new CPU type. >> >> Any comments? > > Object properties the solution? Well, if we need them, yes, but as I say there is no other board using our 946 so the simplest thing is probably to make that 946 model behave the way this board's CPU does. -- PMM
On Fri, 30 Aug 2013 08:29:09 +0100 Peter Maydell <peter.maydell@linaro.org> wrote: > On 30 August 2013 06:09, Peter Crosthwaite <peter.crosthwaite@xilinx.com> wrote: > > On Fri, Aug 30, 2013 at 4:17 AM, Antony Pavlov <antonynpavlov@gmail.com> wrote: > >> If Magic Lantern or CHDK need some specific initial CPU CP15 register state > >> then we can fix it in the platform code without defining new CPU type. > >> > >> Any comments? > > > > Object properties the solution? > > Well, if we need them, yes, but as I say there is no other board > using our 946 so the simplest thing is probably to make that 946 model > behave the way this board's CPU does. I just propose postpone this event as just now there is no user (CHDK or Magic Lantern) that can get any good of this change. w -- Best regards, Antony Pavlov
diff --git a/target-arm/cpu.c b/target-arm/cpu.c index b2556c6..409a311 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -322,6 +322,18 @@ static void arm926_initfn(Object *obj) cpu->reset_sctlr = 0x00090078; } +static void arm946es_initfn(Object *obj) +{ + ARMCPU *cpu = ARM_CPU(obj); + set_feature(&cpu->env, ARM_FEATURE_V5); + set_feature(&cpu->env, ARM_FEATURE_MPU); + set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); + cpu->midr = 0x41059461; + cpu->ctr = (7 << 25) | (1 << 24) | (4 << 18) | (4 << 15) \ + | (2 << 12) | (4 << 6) | (4 << 3) | (2 << 0); + cpu->reset_sctlr = 0x00000078; +} + static void arm946_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -843,6 +855,7 @@ typedef struct ARMCPUInfo { static const ARMCPUInfo arm_cpus[] = { { .name = "arm926", .initfn = arm926_initfn }, + { .name = "arm946e-s", .initfn = arm946es_initfn }, { .name = "arm946", .initfn = arm946_initfn }, { .name = "arm1026", .initfn = arm1026_initfn }, /* What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
This is slightly altered version of ARM946E-S CPU code from EOS QEMU (Magic Lantern project) so nearly all credits go to @a1ex. ARM946E-S Technical Reference Manual can be found here: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0201d/index.html Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> --- target-arm/cpu.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)