| Message ID | 1372886968-17497-10-git-send-email-rth@twiddle.net |
|---|---|
| State | New |
| Headers | show |
On 3 July 2013 22:29, Richard Henderson <rth@twiddle.net> wrote: > -#if defined(__ARM_ARCH_7__) || \ > - defined(__ARM_ARCH_7A__) || \ > - defined(__ARM_ARCH_7EM__) || \ > - defined(__ARM_ARCH_7M__) || \ > - defined(__ARM_ARCH_7R__) > -#define USE_ARMV7_INSTRUCTIONS > +/* The __ARM_ARCH define is provided by gcc 4.8. Construct it otherwise. */ > +#ifndef __ARM_ARCH > +# if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \ > + || defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) \ > + || defined(__ARM_ARCH_7EM__) > +# define __ARM_ARCH 7 > +# elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \ > + || defined(__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__) \ > + || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6T2__) > +# define __ARM_ARCH 6 > +# elif defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5E__) \ > + || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__) \ > + || defined(__ARM_ARCH_5TEJ__) > +# define __ARM_ARCH 5 > +# else > +# define __ARM_ARCH 4 > +# endif > #endif > > -#if defined(USE_ARMV7_INSTRUCTIONS) || \ > - defined(__ARM_ARCH_6J__) || \ > - defined(__ARM_ARCH_6K__) || \ > - defined(__ARM_ARCH_6T2__) || \ > - defined(__ARM_ARCH_6Z__) || \ > - defined(__ARM_ARCH_6ZK__) > -#define USE_ARMV6_INSTRUCTIONS > -#endif > - > -#if defined(USE_ARMV6_INSTRUCTIONS) || \ > - defined(__ARM_ARCH_5T__) || \ > - defined(__ARM_ARCH_5TE__) || \ > - defined(__ARM_ARCH_5TEJ__) > -#define USE_ARMV5_INSTRUCTIONS > -#endif This change means we now set use_armv5_instructions for __ARCH_ARCH_5__ and __ARM_ARCH_5E__, which we didn't before. However one of the things that bool is gating is whether we use the 'blx' insn, which is ARMv5T and above only. So this will break v5-but-not-v5T CPUs. (use_armv6_instructions is similarly now set for __ARCH_ARCH_6__ where it was not before, but none of the things we guard with that test are insns that aren't in base v6.) thanks -- PMM
On 07/04/2013 04:22 AM, Peter Maydell wrote: > > This change means we now set use_armv5_instructions > for __ARCH_ARCH_5__ and __ARM_ARCH_5E__, which we didn't > before. However one of the things that bool is gating is > whether we use the 'blx' insn, which is ARMv5T and above only. > So this will break v5-but-not-v5T CPUs. Hmm. And thus platform=v5 plus HWCAP_THUMB ought to detect that too, eh? r~
On 4 July 2013 18:44, Richard Henderson <rth@twiddle.net> wrote: > On 07/04/2013 04:22 AM, Peter Maydell wrote: >> >> This change means we now set use_armv5_instructions >> for __ARCH_ARCH_5__ and __ARM_ARCH_5E__, which we didn't >> before. However one of the things that bool is gating is >> whether we use the 'blx' insn, which is ARMv5T and above only. >> So this will break v5-but-not-v5T CPUs. > > Hmm. And thus platform=v5 plus HWCAP_THUMB ought to detect > that too, eh? Should do, yes. (v5-but-not-v5T is pretty rare though; the v7 ARM ARM describes it as an "obsolete variant", putting it in the same class as ARMv1, v2 and v3. So if you wanted to argue that we should just not support running on v5-not-T you'd have a fairly reasonable case.) -- PMM
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index 2c46ceb..763b173 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -22,50 +22,28 @@ * THE SOFTWARE. */ -#if defined(__ARM_ARCH_7__) || \ - defined(__ARM_ARCH_7A__) || \ - defined(__ARM_ARCH_7EM__) || \ - defined(__ARM_ARCH_7M__) || \ - defined(__ARM_ARCH_7R__) -#define USE_ARMV7_INSTRUCTIONS +/* The __ARM_ARCH define is provided by gcc 4.8. Construct it otherwise. */ +#ifndef __ARM_ARCH +# if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \ + || defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) \ + || defined(__ARM_ARCH_7EM__) +# define __ARM_ARCH 7 +# elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \ + || defined(__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__) \ + || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6T2__) +# define __ARM_ARCH 6 +# elif defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5E__) \ + || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__) \ + || defined(__ARM_ARCH_5TEJ__) +# define __ARM_ARCH 5 +# else +# define __ARM_ARCH 4 +# endif #endif -#if defined(USE_ARMV7_INSTRUCTIONS) || \ - defined(__ARM_ARCH_6J__) || \ - defined(__ARM_ARCH_6K__) || \ - defined(__ARM_ARCH_6T2__) || \ - defined(__ARM_ARCH_6Z__) || \ - defined(__ARM_ARCH_6ZK__) -#define USE_ARMV6_INSTRUCTIONS -#endif - -#if defined(USE_ARMV6_INSTRUCTIONS) || \ - defined(__ARM_ARCH_5T__) || \ - defined(__ARM_ARCH_5TE__) || \ - defined(__ARM_ARCH_5TEJ__) -#define USE_ARMV5_INSTRUCTIONS -#endif - -#ifdef USE_ARMV5_INSTRUCTIONS -static const int use_armv5_instructions = 1; -#else -static const int use_armv5_instructions = 0; -#endif -#undef USE_ARMV5_INSTRUCTIONS - -#ifdef USE_ARMV6_INSTRUCTIONS -static const int use_armv6_instructions = 1; -#else -static const int use_armv6_instructions = 0; -#endif -#undef USE_ARMV6_INSTRUCTIONS - -#ifdef USE_ARMV7_INSTRUCTIONS -static const int use_armv7_instructions = 1; -#else -static const int use_armv7_instructions = 0; -#endif -#undef USE_ARMV7_INSTRUCTIONS +#define use_armv5_instructions (__ARM_ARCH >= 5) +#define use_armv6_instructions (__ARM_ARCH >= 6) +#define use_armv7_instructions (__ARM_ARCH >= 7) #ifndef use_idiv_instructions bool use_idiv_instructions;
GCC 4.8 defines a handy __ARM_ARCH symbol that we can use, which will make us nicely forward compatible with ARMv8 AArch32. Signed-off-by: Richard Henderson <rth@twiddle.net> --- tcg/arm/tcg-target.c | 62 +++++++++++++++++----------------------------------- 1 file changed, 20 insertions(+), 42 deletions(-)