| Message ID | 1341487947-21760-1-git-send-email-peter.maydell@linaro.org |
|---|---|
| State | New |
| Headers | show |
diff --git a/target-arm/translate.c b/target-arm/translate.c index a2a0ecd..64d7cfd 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -6263,7 +6263,9 @@ static int disas_coproc_insn(CPUARMState * env, DisasContext *s, uint32_t insn) tcg_gen_trunc_i64_i32(tmp, tmp64); store_reg(s, rt, tmp); tcg_gen_shri_i64(tmp64, tmp64, 32); + tmp = tcg_temp_new_i32(); tcg_gen_trunc_i64_i32(tmp, tmp64); + tcg_temp_free_i64(tmp64); store_reg(s, rt2, tmp); } else { TCGv tmp;
Fix errors in the TCG temp handling in the 64 bit coprocessor write path: we were reusing a 32 bit temp after it had been freed by store_reg(), and failing to free a 64 bit temp. This bug has no visible effect at this point because there aren't any non-NOP 64 bit registers yet; it needs to be fixed as a prerequisite for the 64 bit registers in LPAE support. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- I didn't notice this with my earlier LPAE testing because (a) I wasn't testing with an --enable-debug build and (b) it only caused an actual problem when passing more than 512MB of RAM to the LPAE guest... target-arm/translate.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)