Message ID | 1332945448-31266-1-git-send-email-atowers@gmail.com |
---|---|
State | New |
Headers | show |
On 28 March 2012 15:37, Andrew Towers <atowers@gmail.com> wrote: > From: Andrew Towers <atowers@gmail.com> > > Replaces the ARM_FEATURE_VFP3 check when reading MVFR0/1 with a check for > ARM_FEATURE_V6K. Rationale: MVFR0/1 were introduced in the ARM1136 at the > same time as ARMv6K, and a survey of TRMs indicates support in later models. > > According to reference documentation on arm.com, MVFR0 and MVFR1 were > introduced in ARM1136JF-S r1p1 (ARMv6K, VFPv2). They are also present in > ARM1156T2F-S and ARM1176JZF-S, which contain VFP11 r5, and in ARM11 MPCore > r1 which contains VFP11 r4. > > Reference (ARM DDI 0211H, 0290G, 0301H, 0360E) > http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0211h/Ffbefjag.html Unfortunately I think the ARM1156 is the exception which demonstrates that this isn't a V6K feature. The 1156 isn't V6K (it doesn't have the TLS registers or the byte/half/doubleword load/store exclusive instructions), but it does have the MVFR* registers. So I think we need a new ARM_FEATURE_MVFR flag, and in cpu_reset_model_id() have V6K imply MVFR. > Yes, I am slightly abusing the versatilepb hw emulation, but then so is > everyone else in the world who is still waiting for their Raspberry Pi ;) ...I've been wondering if anybody's going to submit patches for an actual rPi board model :-) -- PMM
diff --git a/target-arm/translate.c b/target-arm/translate.c index 81725d1..b5861c8 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -2906,7 +2906,7 @@ static int disas_vfp_insn(CPUARMState * env, DisasContext *s, uint32_t insn) case ARM_VFP_MVFR0: case ARM_VFP_MVFR1: if (IS_USER(s) - || !arm_feature(env, ARM_FEATURE_VFP3)) + || !arm_feature(env, ARM_FEATURE_V6K)) return 1; tmp = load_cpu_field(vfp.xregs[rn]); break;