Show patches with: Archived = No       |   432003 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
net: cadence_gem: clear RX control descriptor net: cadence_gem: clear RX control descriptor - - 1 - --- 2019-06-15 Ramon Fried New
[v2] net: cadence_gem: clear RX control descriptor [v2] net: cadence_gem: clear RX control descriptor - - 1 - --- 2019-07-16 Ramon Fried New
Cadence: gem: fix wraparound in 64bit descriptors Cadence: gem: fix wraparound in 64bit descriptors - - 1 - --- 2020-04-16 Ramon Fried New
[v2] Cadence: gem: fix wraparound in 64bit descriptors [v2] Cadence: gem: fix wraparound in 64bit descriptors - - 1 - --- 2020-04-17 Ramon Fried New
[resend,v2] net: cadence_gem: clear RX control descriptor [resend,v2] net: cadence_gem: clear RX control descriptor - - 2 - --- 2020-04-18 Ramon Fried New
block: m25p80: fix dummy byte count read from spansion cfg register block: m25p80: fix dummy byte count read from spansion cfg register - - - - --- 2022-11-08 Ramon Aerne New
qemu-options: mention C-a h in the -nographic doc - - - - --- 2013-07-20 Ramkumar Ramachandra New
gdbstub: Fix handling of '!' packet with new infra gdbstub: Fix handling of '!' packet with new infra - 1 - - --- 2019-08-05 Ramiro Polla New
ui: fix format specifier in vnc_client_io_error() to avoid break in build. - - - - --- 2017-01-08 Rami Rosen New
[v2] ui: fix format specfier in vnc to avoid break in build. - - - - --- 2017-01-10 Rami Rosen New
rev8: support colon in filenames - - - - --- 2009-08-06 Ram Pai Superseded
Fix bug: SRS instructions would trap to EL3 in Secure EL1 even if specified mode was not monitor mo… - - - - --- 2016-02-22 Ralf-Philipp Weinmann New
Fix bug: SRS instructions would trap to EL3 in Secure EL1 even if specified mode was not monitor mo… - - - - --- 2016-02-22 Ralf-Philipp Weinmann New
hw/riscv: virt: Warn the user if -bios is provided when using KVM hw/riscv: virt: Warn the user if -bios is provided when using KVM - - - - --- 2022-03-23 Ralf Ramsauer New
[v2] hw/riscv: virt: Warn the user if -bios is provided when using KVM [v2] hw/riscv: virt: Warn the user if -bios is provided when using KVM - - 1 - --- 2022-03-23 Ralf Ramsauer New
[v3] hw/riscv: virt: Exit if the user provided -bios in combination with KVM [v3] hw/riscv: virt: Exit if the user provided -bios in combination with KVM - - 3 - --- 2022-04-01 Ralf Ramsauer New
target/riscv: Fix incorrect PTE merge in walk_pte target/riscv: Fix incorrect PTE merge in walk_pte - - 1 - --- 2022-04-01 Ralf Ramsauer New
[v2] target/riscv: Fix incorrect PTE merge in walk_pte [v2] target/riscv: Fix incorrect PTE merge in walk_pte - - 2 - --- 2022-04-04 Ralf Ramsauer New
[v3] target/riscv: Fix incorrect PTE merge in walk_pte [v3] target/riscv: Fix incorrect PTE merge in walk_pte - - 2 - --- 2022-04-23 Ralf Ramsauer New
[1/1] target/riscv: Fix VS mode interrupts forwarding. [1/1] target/riscv: Fix VS mode interrupts forwarding. - - - - --- 2020-02-23 Rajnesh Kanwal New
[1/6] target/riscv: Without H-mode mask all HS mode inturrupts in mie. Add RISC-V Virtual IRQs and IRQ filtering support - - - - --- 2023-05-18 Rajnesh Kanwal New
[2/6] target/riscv: Check for async flag in case of RISCV_EXCP_SEMIHOST. Add RISC-V Virtual IRQs and IRQ filtering support - - - - --- 2023-05-18 Rajnesh Kanwal New
[3/6] target/riscv: Set VS* bits to one in mideleg when H-Ext is enabled Add RISC-V Virtual IRQs and IRQ filtering support - - - - --- 2023-05-18 Rajnesh Kanwal New
[4/6] target/riscv: Split interrupt logic from riscv_cpu_update_mip. Add RISC-V Virtual IRQs and IRQ filtering support - - - - --- 2023-05-18 Rajnesh Kanwal New
[5/6] target/riscv: Add M-mode virtual interrupt and IRQ filtering support. Add RISC-V Virtual IRQs and IRQ filtering support - - - - --- 2023-05-18 Rajnesh Kanwal New
[6/6] target/riscv: Add HS-mode virtual interrupt and IRQ filtering support. Add RISC-V Virtual IRQs and IRQ filtering support - - - - --- 2023-05-18 Rajnesh Kanwal New
[v2,1/6] target/riscv: Without H-mode mask all HS mode inturrupts in mie. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-05-26 Rajnesh Kanwal New
[v2,2/6] target/riscv: Check for async flag in case of RISCV_EXCP_SEMIHOST. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-05-26 Rajnesh Kanwal New
[v2,3/6] target/riscv: Set VS* bits to one in mideleg when H-Ext is enabled target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-05-26 Rajnesh Kanwal New
[v2,4/6] target/riscv: Split interrupt logic from riscv_cpu_update_mip. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-05-26 Rajnesh Kanwal New
[v2,5/6] target/riscv: Add M-mode virtual interrupt and IRQ filtering support. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-05-26 Rajnesh Kanwal New
[v2,6/6] target/riscv: Add HS-mode virtual interrupt and IRQ filtering support. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-05-26 Rajnesh Kanwal New
[v3,1/6] target/riscv: Without H-mode mask all HS mode inturrupts in mie. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-11 Rajnesh Kanwal New
[v3,2/6] target/riscv: Check for async flag in case of RISCV_EXCP_SEMIHOST. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-11 Rajnesh Kanwal New
[v3,3/6] target/riscv: Set VS* bits to one in mideleg when H-Ext is enabled target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-11 Rajnesh Kanwal New
[v3,4/6] target/riscv: Split interrupt logic from riscv_cpu_update_mip. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-11 Rajnesh Kanwal New
[v3,5/6] target/riscv: Add M-mode virtual interrupt and IRQ filtering support. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-11 Rajnesh Kanwal New
[v3,6/6] target/riscv: Add HS-mode virtual interrupt and IRQ filtering support. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-11 Rajnesh Kanwal New
[v4,1/6] target/riscv: Without H-mode mask all HS mode inturrupts in mie. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-12 Rajnesh Kanwal New
[v4,2/6] target/riscv: Check for async flag in case of RISCV_EXCP_SEMIHOST. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-12 Rajnesh Kanwal New
[v4,3/6] target/riscv: Set VS* bits to one in mideleg when H-Ext is enabled target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-12 Rajnesh Kanwal New
[v4,4/6] target/riscv: Split interrupt logic from riscv_cpu_update_mip. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-12 Rajnesh Kanwal New
[v4,5/6] target/riscv: Add M-mode virtual interrupt and IRQ filtering support. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-12 Rajnesh Kanwal New
[v4,6/6] target/riscv: Add HS-mode virtual interrupt and IRQ filtering support. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-12 Rajnesh Kanwal New
[v5,1/6] target/riscv: Without H-mode mask all HS mode inturrupts in mie. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-16 Rajnesh Kanwal New
[v5,2/6] target/riscv: Check for async flag in case of RISCV_EXCP_SEMIHOST. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-16 Rajnesh Kanwal New
[v5,3/6] target/riscv: Set VS* bits to one in mideleg when H-Ext is enabled target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-16 Rajnesh Kanwal New
[v5,4/6] target/riscv: Split interrupt logic from riscv_cpu_update_mip. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-16 Rajnesh Kanwal New
[v5,5/6] target/riscv: Add M-mode virtual interrupt and IRQ filtering support. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-16 Rajnesh Kanwal New
[v5,6/6] target/riscv: Add HS-mode virtual interrupt and IRQ filtering support. target/riscv: Add RISC-V Virtual IRQs and IRQ filtering support - - 1 - --- 2023-10-16 Rajnesh Kanwal New
arm-linux-user, i386-linux-user: Make QEMU act as TCG compiler - - - - --- 2012-02-22 Rajat Goyal New
Doc: Correct the name of qemu-img dd parameter Doc: Correct the name of qemu-img dd parameter - - - - --- 2023-10-13 Rajat Dhasmana New
[v1,1/5] target-ppc: add vector insert instructions - - - - --- 2016-08-04 Rajalakshmi Srinivasaraghavan New
[v1,2/5] target-ppc: add vector extract instructions - - - - --- 2016-08-04 Rajalakshmi Srinivasaraghavan New
[v1,3/5] target-ppc: add vector count trailing zeros instructions - - 1 - --- 2016-08-04 Rajalakshmi Srinivasaraghavan New
[v1,4/5] target-ppc: add vector bit permute doubleword instruction - - - - --- 2016-08-04 Rajalakshmi Srinivasaraghavan New
[v1,5/5] target-ppc: add vector permute right indexed instruction - - - - --- 2016-08-04 Rajalakshmi Srinivasaraghavan New
[v2,1/5] target-ppc: add vector insert instructions - - - - --- 2016-08-09 Rajalakshmi Srinivasaraghavan New
[v2,2/5] target-ppc: add vector extract instructions - - - - --- 2016-08-09 Rajalakshmi Srinivasaraghavan New
[v2,3/5] target-ppc: add vector count trailing zeros instructions - - - - --- 2016-08-09 Rajalakshmi Srinivasaraghavan New
[v2,4/5] target-ppc: add vector bit permute doubleword instruction - - - - --- 2016-08-09 Rajalakshmi Srinivasaraghavan New
[v2,5/5] target-ppc: add vector permute right indexed instruction - - - - --- 2016-08-09 Rajalakshmi Srinivasaraghavan New
[v3,1/5] target-ppc: add vector insert instructions - - - - --- 2016-08-11 Rajalakshmi Srinivasaraghavan New
[v3,2/5] target-ppc: add vector extract instructions - - - - --- 2016-08-11 Rajalakshmi Srinivasaraghavan New
[v3,3/5] target-ppc: add vector count trailing zeros instructions - - 1 - --- 2016-08-11 Rajalakshmi Srinivasaraghavan New
[v3,4/5] target-ppc: add vector bit permute doubleword instruction - - - - --- 2016-08-11 Rajalakshmi Srinivasaraghavan New
[v3,5/5] target-ppc: add vector permute right indexed instruction - - - - --- 2016-08-11 Rajalakshmi Srinivasaraghavan New
[v4,1/5] target-ppc: add vector insert instructions - - - - --- 2016-08-24 Rajalakshmi Srinivasaraghavan New
[v4,2/5] target-ppc: add vector extract instructions - - - - --- 2016-08-24 Rajalakshmi Srinivasaraghavan New
[v4,3/5] target-ppc: add vector count trailing zeros instructions - - 1 - --- 2016-08-24 Rajalakshmi Srinivasaraghavan New
[v4,4/5] target-ppc: add vector bit permute doubleword instruction - - - - --- 2016-08-24 Rajalakshmi Srinivasaraghavan New
[v4,5/5] target-ppc: add vector permute right indexed instruction - - - - --- 2016-08-24 Rajalakshmi Srinivasaraghavan New
[v5,1/5] target-ppc: add vector insert instructions - - - - --- 2016-09-01 Rajalakshmi Srinivasaraghavan New
[v5,2/5] target-ppc: add vector extract instructions - - - - --- 2016-09-01 Rajalakshmi Srinivasaraghavan New
[v5,3/5] target-ppc: add vector count trailing zeros instructions - - 1 - --- 2016-09-01 Rajalakshmi Srinivasaraghavan New
[v5,4/5] target-ppc: add vector bit permute doubleword instruction - - - - --- 2016-09-01 Rajalakshmi Srinivasaraghavan New
[v5,5/5] target-ppc: add vector permute right indexed instruction - - - - --- 2016-09-01 Rajalakshmi Srinivasaraghavan New
[v6,1/5] target-ppc: add vector insert instructions - - - - --- 2016-09-06 Rajalakshmi Srinivasaraghavan New
[v6,2/5] target-ppc: add vector extract instructions - - - - --- 2016-09-06 Rajalakshmi Srinivasaraghavan New
[v6,3/5] target-ppc: add vector count trailing zeros instructions - - 1 - --- 2016-09-06 Rajalakshmi Srinivasaraghavan New
[v6,4/5] target-ppc: add vector bit permute doubleword instruction - - - - --- 2016-09-06 Rajalakshmi Srinivasaraghavan New
[v6,5/5] target-ppc: add vector permute right indexed instruction - - - - --- 2016-09-06 Rajalakshmi Srinivasaraghavan New
[1/6] target-ppc: add vmul10[u, eu, cu, ecu]q instructions - - - - --- 2016-09-28 Rajalakshmi Srinivasaraghavan New
[2/6] target-ppc: add vextu[bhw]lx instructions - - - - --- 2016-09-28 Rajalakshmi Srinivasaraghavan New
[3/6] target-ppc: add vextu[bhw]rx instructions - - - - --- 2016-09-28 Rajalakshmi Srinivasaraghavan New
[4/6] target-ppc: fix invalid mask - cmpl, bctar - - - - --- 2016-09-28 Rajalakshmi Srinivasaraghavan New
[5/6] target-ppc: add vector compare not equal instructions - - 1 - --- 2016-09-28 Rajalakshmi Srinivasaraghavan New
[6/6] target-ppc: add vclzlsbb/vctzlsbb instructions - - 1 - --- 2016-09-28 Rajalakshmi Srinivasaraghavan New
[2/6] target-ppc: add vextu[bhw]lx instructions - - - - --- 2016-10-25 Rajalakshmi Srinivasaraghavan New
[3/6] target-ppc: add vextu[bhw]rx instructions - - - - --- 2016-10-25 Rajalakshmi Srinivasaraghavan New
cocoa: Suppress Cocoa window with -display - - 1 - --- 2015-09-09 Rainer Müller New
[qemu-web] download: Add instructions for MacPorts [qemu-web] download: Add instructions for MacPorts - - - - --- 2018-04-01 Rainer Müller New
[1/2] input-linux: Delay grab toggle if keys are pressed input-linux: Allow to toggle grab from QMP - - - - --- 2021-05-01 Rainer Müller New
[2/2] input-linux: Allow to toggle grab from QMP input-linux: Allow to toggle grab from QMP - - - - --- 2021-05-01 Rainer Müller New
linux-user: Use memfd for open syscall emulation linux-user: Use memfd for open syscall emulation - - - - --- 2022-07-25 Rainer Müller New
[v2] linux-user: Use memfd for open syscall emulation [v2] linux-user: Use memfd for open syscall emulation - - 1 - --- 2022-07-29 Rainer Müller New
target/riscv: csr: Implement mconfigptr CSR target/riscv: csr: Implement mconfigptr CSR - - - - --- 2021-10-03 Rahul Pathak New
[v2,1/2] target/riscv: Add priv spec 1.12.0 version check mconfigptr support - - - - --- 2021-10-25 Rahul Pathak New
[v2,2/2] target/riscv: csr: Implement mconfigptr CSR mconfigptr support - - - - --- 2021-10-25 Rahul Pathak New
target/riscv: fix user-mode build issue because mhartid target/riscv: fix user-mode build issue because mhartid - - - - --- 2022-06-27 Rahul Pathak New
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