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[for-4.2,00/24] target/arm: Implement ARMv8.1-VHE

Message ID 20190719210326.15466-1-richard.henderson@linaro.org
Headers show
Series target/arm: Implement ARMv8.1-VHE | expand

Message

Richard Henderson July 19, 2019, 9:03 p.m. UTC
About half of this patch set is cleanup of the qemu tlb handling
leading up to the actual implementation of VHE, and the biggest
piece of that: The EL2&0 translation regime.

Testing so far has been limited to booting a debian 9 system with
a 4.9 kernel, and a fedora 30 system with a 5.1 kernel.  Both have
KVM enabled, and both report enabling VHE is successful.


r~


Richard Henderson (24):
  cputlb: Add tlb_set_asid_for_mmuidx
  cputlb: Add tlb_flush_asid_by_mmuidx and friends
  target/arm: Install ASIDs for long-form from EL1
  target/arm: Install ASIDs for short-form from EL1
  target/arm: Install ASIDs for EL2
  target/arm: Define isar_feature_aa64_vh
  target/arm: Enable HCR_E2H for VHE
  target/arm: Add CONTEXTIDR_EL2
  target/arm: Add TTBR1_EL2
  target/arm: Update CNTVCT_EL0 for VHE
  target/arm: Add the hypervisor virtual counter
  target/arm: Add VHE system register redirection and aliasing
  target/arm: Split out vae1_tlbmask, vmalle1_tlbmask
  target/arm: Simplify tlb_force_broadcast alternatives
  target/arm: Reorganize ARMMMUIdx
  target/arm: Add regime_has_2_ranges
  target/arm: Update arm_mmu_idx for VHE
  target/arm: Update arm_sctlr for VHE
  target/arm: Install asids for E2&0 translation regime
  target/arm: Flush tlbs for E2&0 translation regime
  target/arm: Update arm_phys_excp_target_el for TGE
  target/arm: Update regime_is_user for EL2&0
  target/arm: Update {fp,sve}_exception_el for VHE
  target/arm: Enable ARMv8.1-VHE in -cpu max

 include/exec/cpu-all.h     |  11 +
 include/exec/cpu-defs.h    |   2 +
 include/exec/exec-all.h    |  35 ++
 include/qom/cpu.h          |   1 +
 target/arm/cpu-qom.h       |   1 +
 target/arm/cpu.h           | 259 +++++-----
 target/arm/internals.h     |  62 ++-
 target/arm/translate.h     |   2 +-
 accel/tcg/cputlb.c         |  77 +++
 target/arm/arch_dump.c     |   2 +-
 target/arm/cpu.c           |   2 +
 target/arm/cpu64.c         |   1 +
 target/arm/debug_helper.c  |  50 +-
 target/arm/helper-a64.c    |   2 +-
 target/arm/helper.c        | 985 ++++++++++++++++++++++++++-----------
 target/arm/m_helper.c      |   6 +-
 target/arm/pauth_helper.c  |   9 +-
 target/arm/translate-a64.c |  14 +-
 target/arm/translate.c     |  17 +-
 19 files changed, 1058 insertions(+), 480 deletions(-)

Comments

Alex Bennée July 22, 2019, 7:31 a.m. UTC | #1
Richard Henderson <richard.henderson@linaro.org> writes:

> About half of this patch set is cleanup of the qemu tlb handling
> leading up to the actual implementation of VHE, and the biggest
> piece of that: The EL2&0 translation regime.
>
> Testing so far has been limited to booting a debian 9 system with
> a 4.9 kernel, and a fedora 30 system with a 5.1 kernel.  Both have
> KVM enabled, and both report enabling VHE is successful.

check-tcg is throwing up errors for ARM:

ERROR:/home/alex/lsrc/qemu.git/target/arm/helper.c:5353:define_arm_vh_e2h_redirects_aliases:assertion failed: (src_reg != NULL)

>
>
> r~
>
>
> Richard Henderson (24):
>   cputlb: Add tlb_set_asid_for_mmuidx
>   cputlb: Add tlb_flush_asid_by_mmuidx and friends
>   target/arm: Install ASIDs for long-form from EL1
>   target/arm: Install ASIDs for short-form from EL1
>   target/arm: Install ASIDs for EL2
>   target/arm: Define isar_feature_aa64_vh
>   target/arm: Enable HCR_E2H for VHE
>   target/arm: Add CONTEXTIDR_EL2
>   target/arm: Add TTBR1_EL2
>   target/arm: Update CNTVCT_EL0 for VHE
>   target/arm: Add the hypervisor virtual counter
>   target/arm: Add VHE system register redirection and aliasing
>   target/arm: Split out vae1_tlbmask, vmalle1_tlbmask
>   target/arm: Simplify tlb_force_broadcast alternatives
>   target/arm: Reorganize ARMMMUIdx
>   target/arm: Add regime_has_2_ranges
>   target/arm: Update arm_mmu_idx for VHE
>   target/arm: Update arm_sctlr for VHE
>   target/arm: Install asids for E2&0 translation regime
>   target/arm: Flush tlbs for E2&0 translation regime
>   target/arm: Update arm_phys_excp_target_el for TGE
>   target/arm: Update regime_is_user for EL2&0
>   target/arm: Update {fp,sve}_exception_el for VHE
>   target/arm: Enable ARMv8.1-VHE in -cpu max
>
>  include/exec/cpu-all.h     |  11 +
>  include/exec/cpu-defs.h    |   2 +
>  include/exec/exec-all.h    |  35 ++
>  include/qom/cpu.h          |   1 +
>  target/arm/cpu-qom.h       |   1 +
>  target/arm/cpu.h           | 259 +++++-----
>  target/arm/internals.h     |  62 ++-
>  target/arm/translate.h     |   2 +-
>  accel/tcg/cputlb.c         |  77 +++
>  target/arm/arch_dump.c     |   2 +-
>  target/arm/cpu.c           |   2 +
>  target/arm/cpu64.c         |   1 +
>  target/arm/debug_helper.c  |  50 +-
>  target/arm/helper-a64.c    |   2 +-
>  target/arm/helper.c        | 985 ++++++++++++++++++++++++++-----------
>  target/arm/m_helper.c      |   6 +-
>  target/arm/pauth_helper.c  |   9 +-
>  target/arm/translate-a64.c |  14 +-
>  target/arm/translate.c     |  17 +-
>  19 files changed, 1058 insertions(+), 480 deletions(-)


--
Alex Bennée
Alex Bennée July 22, 2019, 9:37 a.m. UTC | #2
Alex Bennée <alex.bennee@linaro.org> writes:

> Richard Henderson <richard.henderson@linaro.org> writes:
>
>> About half of this patch set is cleanup of the qemu tlb handling
>> leading up to the actual implementation of VHE, and the biggest
>> piece of that: The EL2&0 translation regime.
>>
>> Testing so far has been limited to booting a debian 9 system with
>> a 4.9 kernel, and a fedora 30 system with a 5.1 kernel.  Both have
>> KVM enabled, and both report enabling VHE is successful.
>
> check-tcg is throwing up errors for ARM:
>
> ERROR:/home/alex/lsrc/qemu.git/target/arm/helper.c:5353:define_arm_vh_e2h_redirects_aliases:assertion
> failed: (src_reg != NULL)

I'm going to go out on a limb and say this is because the aliases
registers are SoftMMU only. Do we even want to handle any re-directs for
linux-user?

>
>>
>>
>> r~
>>
>>
>> Richard Henderson (24):
>>   cputlb: Add tlb_set_asid_for_mmuidx
>>   cputlb: Add tlb_flush_asid_by_mmuidx and friends
>>   target/arm: Install ASIDs for long-form from EL1
>>   target/arm: Install ASIDs for short-form from EL1
>>   target/arm: Install ASIDs for EL2
>>   target/arm: Define isar_feature_aa64_vh
>>   target/arm: Enable HCR_E2H for VHE
>>   target/arm: Add CONTEXTIDR_EL2
>>   target/arm: Add TTBR1_EL2
>>   target/arm: Update CNTVCT_EL0 for VHE
>>   target/arm: Add the hypervisor virtual counter
>>   target/arm: Add VHE system register redirection and aliasing
>>   target/arm: Split out vae1_tlbmask, vmalle1_tlbmask
>>   target/arm: Simplify tlb_force_broadcast alternatives
>>   target/arm: Reorganize ARMMMUIdx
>>   target/arm: Add regime_has_2_ranges
>>   target/arm: Update arm_mmu_idx for VHE
>>   target/arm: Update arm_sctlr for VHE
>>   target/arm: Install asids for E2&0 translation regime
>>   target/arm: Flush tlbs for E2&0 translation regime
>>   target/arm: Update arm_phys_excp_target_el for TGE
>>   target/arm: Update regime_is_user for EL2&0
>>   target/arm: Update {fp,sve}_exception_el for VHE
>>   target/arm: Enable ARMv8.1-VHE in -cpu max
>>
>>  include/exec/cpu-all.h     |  11 +
>>  include/exec/cpu-defs.h    |   2 +
>>  include/exec/exec-all.h    |  35 ++
>>  include/qom/cpu.h          |   1 +
>>  target/arm/cpu-qom.h       |   1 +
>>  target/arm/cpu.h           | 259 +++++-----
>>  target/arm/internals.h     |  62 ++-
>>  target/arm/translate.h     |   2 +-
>>  accel/tcg/cputlb.c         |  77 +++
>>  target/arm/arch_dump.c     |   2 +-
>>  target/arm/cpu.c           |   2 +
>>  target/arm/cpu64.c         |   1 +
>>  target/arm/debug_helper.c  |  50 +-
>>  target/arm/helper-a64.c    |   2 +-
>>  target/arm/helper.c        | 985 ++++++++++++++++++++++++++-----------
>>  target/arm/m_helper.c      |   6 +-
>>  target/arm/pauth_helper.c  |   9 +-
>>  target/arm/translate-a64.c |  14 +-
>>  target/arm/translate.c     |  17 +-
>>  19 files changed, 1058 insertions(+), 480 deletions(-)


--
Alex Bennée
Richard Henderson July 22, 2019, 3:10 p.m. UTC | #3
On 7/22/19 2:37 AM, Alex Bennée wrote:
>>> Testing so far has been limited to booting a debian 9 system with
>>> a 4.9 kernel, and a fedora 30 system with a 5.1 kernel.  Both have
>>> KVM enabled, and both report enabling VHE is successful.
>>
>> check-tcg is throwing up errors for ARM:
>>
>> ERROR:/home/alex/lsrc/qemu.git/target/arm/helper.c:5353:define_arm_vh_e2h_redirects_aliases:assertion
>> failed: (src_reg != NULL)
> 
> I'm going to go out on a limb and say this is because the aliases
> registers are SoftMMU only. Do we even want to handle any re-directs for
> linux-user?

Ah, no.  Thanks for the inspection.


r~
Alex Bennée July 25, 2019, 4:15 p.m. UTC | #4
Richard Henderson <richard.henderson@linaro.org> writes:

> About half of this patch set is cleanup of the qemu tlb handling
> leading up to the actual implementation of VHE, and the biggest
> piece of that: The EL2&0 translation regime.
>
> Testing so far has been limited to booting a debian 9 system with
> a 4.9 kernel, and a fedora 30 system with a 5.1 kernel.  Both have
> KVM enabled, and both report enabling VHE is successful.

So you haven't booted a kernel via KVM inside the emulation yet? That
might explain why I was struggling to do so. For example single-stepping
through the guest kernel gets stuck. I suspect that means some state
machine doesn't quite work (or possibly that is an existing bug, I need
to check without VHE as well).

Anyway I've done my pass for now. I'll come back to the later patches
when more stuff is working.

>
>
> r~
>
>
> Richard Henderson (24):
>   cputlb: Add tlb_set_asid_for_mmuidx
>   cputlb: Add tlb_flush_asid_by_mmuidx and friends
>   target/arm: Install ASIDs for long-form from EL1
>   target/arm: Install ASIDs for short-form from EL1
>   target/arm: Install ASIDs for EL2
>   target/arm: Define isar_feature_aa64_vh
>   target/arm: Enable HCR_E2H for VHE
>   target/arm: Add CONTEXTIDR_EL2
>   target/arm: Add TTBR1_EL2
>   target/arm: Update CNTVCT_EL0 for VHE
>   target/arm: Add the hypervisor virtual counter
>   target/arm: Add VHE system register redirection and aliasing
>   target/arm: Split out vae1_tlbmask, vmalle1_tlbmask
>   target/arm: Simplify tlb_force_broadcast alternatives
>   target/arm: Reorganize ARMMMUIdx
>   target/arm: Add regime_has_2_ranges
>   target/arm: Update arm_mmu_idx for VHE
>   target/arm: Update arm_sctlr for VHE
>   target/arm: Install asids for E2&0 translation regime
>   target/arm: Flush tlbs for E2&0 translation regime
>   target/arm: Update arm_phys_excp_target_el for TGE
>   target/arm: Update regime_is_user for EL2&0
>   target/arm: Update {fp,sve}_exception_el for VHE
>   target/arm: Enable ARMv8.1-VHE in -cpu max
>
>  include/exec/cpu-all.h     |  11 +
>  include/exec/cpu-defs.h    |   2 +
>  include/exec/exec-all.h    |  35 ++
>  include/qom/cpu.h          |   1 +
>  target/arm/cpu-qom.h       |   1 +
>  target/arm/cpu.h           | 259 +++++-----
>  target/arm/internals.h     |  62 ++-
>  target/arm/translate.h     |   2 +-
>  accel/tcg/cputlb.c         |  77 +++
>  target/arm/arch_dump.c     |   2 +-
>  target/arm/cpu.c           |   2 +
>  target/arm/cpu64.c         |   1 +
>  target/arm/debug_helper.c  |  50 +-
>  target/arm/helper-a64.c    |   2 +-
>  target/arm/helper.c        | 985 ++++++++++++++++++++++++++-----------
>  target/arm/m_helper.c      |   6 +-
>  target/arm/pauth_helper.c  |   9 +-
>  target/arm/translate-a64.c |  14 +-
>  target/arm/translate.c     |  17 +-
>  19 files changed, 1058 insertions(+), 480 deletions(-)


--
Alex Bennée