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[risu,v2,0/3] Miscellaneous fixes for powerpc64

Message ID 20180306120813.17537-1-sandipan@linux.vnet.ibm.com
Headers show
Series Miscellaneous fixes for powerpc64 | expand

Message

Sandipan Das March 6, 2018, 12:08 p.m. UTC 
The first patch adds the patterns for the missing byte and
doubleword load instructions. The second patch fixes mismatches
encountered when using the load quadword instruction. The last
patch fixes a minor typo in the floating-point register prefix
shown when dumping the register values.

Changelog:
v2 -> Added a cover letter as requested by Peter.

Sandipan Das (3):
  ppc64.risu: Add missing byte and dword loads
  ppc64.risu: Fix pattern for load qword
  risu_reginfo_ppc64.c: Fix register name prefix

 ppc64.risu           | 29 +++++++++++++++++++++++++++--
 risu_reginfo_ppc64.c |  4 ++--
 2 files changed, 29 insertions(+), 4 deletions(-)

Comments

Peter Maydell March 6, 2018, 1:05 p.m. UTC | #1 
On 6 March 2018 at 12:08, Sandipan Das <sandipan@linux.vnet.ibm.com> wrote:
> The first patch adds the patterns for the missing byte and
> doubleword load instructions. The second patch fixes mismatches
> encountered when using the load quadword instruction. The last
> patch fixes a minor typo in the floating-point register prefix
> shown when dumping the register values.
>
> Changelog:
> v2 -> Added a cover letter as requested by Peter.
>
> Sandipan Das (3):
>   ppc64.risu: Add missing byte and dword loads
>   ppc64.risu: Fix pattern for load qword
>   risu_reginfo_ppc64.c: Fix register name prefix
>
>  ppc64.risu           | 29 +++++++++++++++++++++++++++--
>  risu_reginfo_ppc64.c |  4 ++--
>  2 files changed, 29 insertions(+), 4 deletions(-)

Thanks; I've applied these to risu master.

-- PMM