[01/13] realtek: add missing gpio0 pinctrl properties

Message ID	20211208214309.233041-2-sander@svanheule.net
State	Superseded
Headers	show Return-Path: <openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org> sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id 599D227E13A; Wed, 8 Dec 2021 22:43:20 +0100 (CET) From: Sander Vanheule <sander@svanheule.net> To: openwrt-devel@lists.openwrt.org Cc: INAGAKI Hiroshi <musashino.open@gmail.com>, Birger Koblitz <mail@birger-koblitz.de>, John Crispin <john@phrozen.org>, Sander Vanheule <sander@svanheule.net> Subject: [PATCH 01/13] realtek: add missing gpio0 pinctrl properties Date: Wed, 8 Dec 2021 22:42:57 +0100 Message-Id: <20211208214309.233041-2-sander@svanheule.net> In-Reply-To: <20211208214309.233041-1-sander@svanheule.net> References: <20211208214309.233041-1-sander@svanheule.net> MIME-Version: 1.0 preview: Not all devices using the gpio0/sys-led pin as a GPIO, configure the pinmux. Add the necessary pinctrl properties to these devices to ensure the pin is set up for use as GPIO. Co-developed-by: INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by: Sander Vanheule <sander@svanheule.net> --- target/linux/realtek/dts [...] Content analysis details: (-2.5 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [84.16.241.116 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain Precedence: list Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "openwrt-devel" <openwrt-devel-bounces@lists.openwrt.org> Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org
Series	Switch realtek target to upstream platform \| expand [00/13] Switch realtek target to upstream platform [01/13] realtek: add missing gpio0 pinctrl properties [02/13] realtek: add sys-led disable pinctrl for rtl930x [03/13] realtek: remove hardcoded sys-led configurations [04/13] realtek: use fixed-clock as CPU clock [05/13] realtek: include io.h in mach-rtl83xx.h [06/13] realtek: update mach-rtl83xx.h includes [07/13] realtek: backport upstream platform [08/13] realtek: add board file for MACH_REALTEK_RTL [09/13] realtek: update driver platform dependencies [10/13] realtek: switch target to upstream platform [11/13] realtek: drop downstream platform [12/13] realtek: modernise devicetree console setup [13/13] realtek: use correct compatible for rtl930x SoCs

Message ID

20211208214309.233041-2-sander@svanheule.net

State

Superseded

Headers

From: Sander Vanheule <sander@svanheule.net>
To: openwrt-devel@lists.openwrt.org
Cc: INAGAKI Hiroshi <musashino.open@gmail.com>,
 Birger Koblitz <mail@birger-koblitz.de>, John Crispin <john@phrozen.org>,
 Sander Vanheule <sander@svanheule.net>
Subject: [PATCH 01/13] realtek: add missing gpio0 pinctrl properties
Date: Wed,  8 Dec 2021 22:42:57 +0100
Message-Id: <20211208214309.233041-2-sander@svanheule.net>
In-Reply-To: <20211208214309.233041-1-sander@svanheule.net>
References: <20211208214309.233041-1-sander@svanheule.net>
MIME-Version: 1.0
Precedence: list
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Sender: "openwrt-devel" <openwrt-devel-bounces@lists.openwrt.org>
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 openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org

Series

Switch realtek target to upstream platform | expand

Commit Message

Sander Vanheule Dec. 8, 2021, 9:42 p.m. UTC

Not all devices using the gpio0/sys-led pin as a GPIO, configure the
pinmux. Add the necessary pinctrl properties to these devices to ensure
the pin is set up for use as GPIO.

Co-developed-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
---
 target/linux/realtek/dts-5.10/rtl8380_netgear_gigabit.dtsi | 3 +++
 target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210.dtsi | 3 +++
 target/linux/realtek/dts-5.10/rtl8382_inaba_aml2-17gp.dts  | 3 +++
 3 files changed, 9 insertions(+)

diff --git a/target/linux/realtek/dts-5.10/rtl8380_netgear_gigabit.dtsi b/target/linux/realtek/dts-5.10/rtl8380_netgear_gigabit.dtsi
index 72956359d18b..d91403fd2092 100644
--- a/target/linux/realtek/dts-5.10/rtl8380_netgear_gigabit.dtsi
+++ b/target/linux/realtek/dts-5.10/rtl8380_netgear_gigabit.dtsi
@@ -14,6 +14,9 @@ 
 	};
 
 	keys {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinmux_disable_sys_led>;
+
 		compatible = "gpio-keys";
 
 		mode {
diff --git a/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210.dtsi b/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210.dtsi
index 312a36c1a844..219814eb4a58 100644
--- a/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210.dtsi
+++ b/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210.dtsi
@@ -19,6 +19,9 @@ 
 	};
 
 	leds {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinmux_disable_sys_led>;
+
 		compatible = "gpio-leds";
 
 		led_power: power {
diff --git a/target/linux/realtek/dts-5.10/rtl8382_inaba_aml2-17gp.dts b/target/linux/realtek/dts-5.10/rtl8382_inaba_aml2-17gp.dts
index 30960afff4d9..48081414941f 100644
--- a/target/linux/realtek/dts-5.10/rtl8382_inaba_aml2-17gp.dts
+++ b/target/linux/realtek/dts-5.10/rtl8382_inaba_aml2-17gp.dts
@@ -15,6 +15,9 @@ 
 	};
 
 	keys {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinmux_disable_sys_led>;
+
 		compatible = "gpio-keys";
 
 		reset {

[01/13] realtek: add missing gpio0 pinctrl properties

Commit Message

Patch