[OpenWrt-Devel] ath79: reduce irq count in irq-ath79-misc.c

Message ID	1534935022-17764-1-git-send-email-hanipouspilot@gmail.com
State	Changes Requested
Headers	show Return-Path: <openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org> From: Dmitry Tunin <hanipouspilot@gmail.com> To: openwrt-devel@lists.openwrt.org Date: Wed, 22 Aug 2018 13:50:22 +0300 Message-Id: <1534935022-17764-1-git-send-email-hanipouspilot@gmail.com> summary: Content analysis details: (-0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:142 listed in] [list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (hanipouspilot[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Subject: [OpenWrt-Devel] [PATCH] ath79: reduce irq count in irq-ath79-misc.c Precedence: list Cc: Dmitry Tunin <hanipouspilot@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "openwrt-devel" <openwrt-devel-bounces@lists.openwrt.org> Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org
Series	[OpenWrt-Devel] ath79: reduce irq count in irq-ath79-misc.c \| expand [OpenWrt-Devel] ath79: reduce irq count in irq-ath79-misc.c

Dmitry Tunin Aug. 22, 2018, 10:50 a.m. UTC

According to specs this interrupt controller has 8 IRQs (0-7).
If we reuse it for PCI, we need even less (0-4).
We don't need that hude domain there.

Signed-off-by: Dmitry Tunin <hanipouspilot@gmail.com>
---
 .../0037-MIPS-ath79-irq-misc-reduce-irq-count.patch         | 13 +++++++++++++
 1 file changed, 13 insertions(+)
 create mode 100644 target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch

Dmitry Tunin Aug. 22, 2018, 10:59 a.m. UTC | #1

Oops. I looked into newer specs. Some chips now have 16.
ср, 22 авг. 2018 г. в 13:50, Dmitry Tunin <hanipouspilot@gmail.com>:
>
> According to specs this interrupt controller has 8 IRQs (0-7).
> If we reuse it for PCI, we need even less (0-4).
> We don't need that hude domain there.
>
> Signed-off-by: Dmitry Tunin <hanipouspilot@gmail.com>
> ---
>  .../0037-MIPS-ath79-irq-misc-reduce-irq-count.patch         | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>  create mode 100644 target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
>
> diff --git a/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch b/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> new file mode 100644
> index 0000000..b9ab092
> --- /dev/null
> +++ b/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> @@ -0,0 +1,13 @@
> +Index: linux-4.14.65/drivers/irqchip/irq-ath79-misc.c
> +===================================================================
> +--- linux-4.14.65.orig/drivers/irqchip/irq-ath79-misc.c
> ++++ linux-4.14.65/drivers/irqchip/irq-ath79-misc.c
> +@@ -21,7 +21,7 @@
> + #define AR71XX_RESET_REG_MISC_INT_STATUS      0
> + #define AR71XX_RESET_REG_MISC_INT_ENABLE      4
> +
> +-#define ATH79_MISC_IRQ_COUNT                  32
> ++#define AR71XX_MISC_IRQ_COUNT                 8
> +
> + static void ath79_misc_irq_handler(struct irq_desc *desc)
> + {
> --
> 2.7.4
>

Dmitry Tunin Aug. 22, 2018, 12:30 p.m. UTC | #2

We probably need to add a SoC check there. Otherwise we'll have two 32
IRQ domains when using it with PCI.
I guess older ones have 8 IRQs and newer ones - 16. We cal leave
default of 32 for unknown SoCs if there are any.
ср, 22 авг. 2018 г. в 13:59, Dmitry Tunin <hanipouspilot@gmail.com>:
>
> Oops. I looked into newer specs. Some chips now have 16.
> ср, 22 авг. 2018 г. в 13:50, Dmitry Tunin <hanipouspilot@gmail.com>:
> >
> > According to specs this interrupt controller has 8 IRQs (0-7).
> > If we reuse it for PCI, we need even less (0-4).
> > We don't need that hude domain there.
> >
> > Signed-off-by: Dmitry Tunin <hanipouspilot@gmail.com>
> > ---
> >  .../0037-MIPS-ath79-irq-misc-reduce-irq-count.patch         | 13 +++++++++++++
> >  1 file changed, 13 insertions(+)
> >  create mode 100644 target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> >
> > diff --git a/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch b/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> > new file mode 100644
> > index 0000000..b9ab092
> > --- /dev/null
> > +++ b/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> > @@ -0,0 +1,13 @@
> > +Index: linux-4.14.65/drivers/irqchip/irq-ath79-misc.c
> > +===================================================================
> > +--- linux-4.14.65.orig/drivers/irqchip/irq-ath79-misc.c
> > ++++ linux-4.14.65/drivers/irqchip/irq-ath79-misc.c
> > +@@ -21,7 +21,7 @@
> > + #define AR71XX_RESET_REG_MISC_INT_STATUS      0
> > + #define AR71XX_RESET_REG_MISC_INT_ENABLE      4
> > +
> > +-#define ATH79_MISC_IRQ_COUNT                  32
> > ++#define AR71XX_MISC_IRQ_COUNT                 8
> > +
> > + static void ath79_misc_irq_handler(struct irq_desc *desc)
> > + {
> > --
> > 2.7.4
> >

Chuanhong Guo Aug. 22, 2018, 12:34 p.m. UTC | #3

Hi!
Dmitry Tunin <hanipouspilot@gmail.com> 于2018年8月22日周三 下午8:31写道：
>
> We probably need to add a SoC check there. Otherwise we'll have two 32
> IRQ domains when using it with PCI.
But this doesn't matter at all :)
> I guess older ones have 8 IRQs and newer ones - 16. We cal leave
> default of 32 for unknown SoCs if there are any.
> ср, 22 авг. 2018 г. в 13:59, Dmitry Tunin <hanipouspilot@gmail.com>:
> >
> > Oops. I looked into newer specs. Some chips now have 16.
> > ср, 22 авг. 2018 г. в 13:50, Dmitry Tunin <hanipouspilot@gmail.com>:
> > >
> > > According to specs this interrupt controller has 8 IRQs (0-7).
> > > If we reuse it for PCI, we need even less (0-4).
> > > We don't need that hude domain there.
> > >
> > > Signed-off-by: Dmitry Tunin <hanipouspilot@gmail.com>
> > > ---
> > >  .../0037-MIPS-ath79-irq-misc-reduce-irq-count.patch         | 13 +++++++++++++
> > >  1 file changed, 13 insertions(+)
> > >  create mode 100644 target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> > >
> > > diff --git a/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch b/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> > > new file mode 100644
> > > index 0000000..b9ab092
> > > --- /dev/null
> > > +++ b/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> > > @@ -0,0 +1,13 @@
> > > +Index: linux-4.14.65/drivers/irqchip/irq-ath79-misc.c
> > > +===================================================================
> > > +--- linux-4.14.65.orig/drivers/irqchip/irq-ath79-misc.c
> > > ++++ linux-4.14.65/drivers/irqchip/irq-ath79-misc.c
> > > +@@ -21,7 +21,7 @@
> > > + #define AR71XX_RESET_REG_MISC_INT_STATUS      0
> > > + #define AR71XX_RESET_REG_MISC_INT_ENABLE      4
> > > +
> > > +-#define ATH79_MISC_IRQ_COUNT                  32
> > > ++#define AR71XX_MISC_IRQ_COUNT                 8
> > > +
> > > + static void ath79_misc_irq_handler(struct irq_desc *desc)
> > > + {
> > > --
> > > 2.7.4
> > >
>
> _______________________________________________
> openwrt-devel mailing list
> openwrt-devel@lists.openwrt.org
> https://lists.openwrt.org/mailman/listinfo/openwrt-devel

Dmitry Tunin Aug. 22, 2018, 12:35 p.m. UTC | #4

It allocates some RAM I guess.
ср, 22 авг. 2018 г. в 15:34, Chuanhong Guo <gch981213@gmail.com>:
>
> Hi!
> Dmitry Tunin <hanipouspilot@gmail.com> 于2018年8月22日周三 下午8:31写道：
> >
> > We probably need to add a SoC check there. Otherwise we'll have two 32
> > IRQ domains when using it with PCI.
> But this doesn't matter at all :)
> > I guess older ones have 8 IRQs and newer ones - 16. We cal leave
> > default of 32 for unknown SoCs if there are any.
> > ср, 22 авг. 2018 г. в 13:59, Dmitry Tunin <hanipouspilot@gmail.com>:
> > >
> > > Oops. I looked into newer specs. Some chips now have 16.
> > > ср, 22 авг. 2018 г. в 13:50, Dmitry Tunin <hanipouspilot@gmail.com>:
> > > >
> > > > According to specs this interrupt controller has 8 IRQs (0-7).
> > > > If we reuse it for PCI, we need even less (0-4).
> > > > We don't need that hude domain there.
> > > >
> > > > Signed-off-by: Dmitry Tunin <hanipouspilot@gmail.com>
> > > > ---
> > > >  .../0037-MIPS-ath79-irq-misc-reduce-irq-count.patch         | 13 +++++++++++++
> > > >  1 file changed, 13 insertions(+)
> > > >  create mode 100644 target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> > > >
> > > > diff --git a/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch b/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> > > > new file mode 100644
> > > > index 0000000..b9ab092
> > > > --- /dev/null
> > > > +++ b/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> > > > @@ -0,0 +1,13 @@
> > > > +Index: linux-4.14.65/drivers/irqchip/irq-ath79-misc.c
> > > > +===================================================================
> > > > +--- linux-4.14.65.orig/drivers/irqchip/irq-ath79-misc.c
> > > > ++++ linux-4.14.65/drivers/irqchip/irq-ath79-misc.c
> > > > +@@ -21,7 +21,7 @@
> > > > + #define AR71XX_RESET_REG_MISC_INT_STATUS      0
> > > > + #define AR71XX_RESET_REG_MISC_INT_ENABLE      4
> > > > +
> > > > +-#define ATH79_MISC_IRQ_COUNT                  32
> > > > ++#define AR71XX_MISC_IRQ_COUNT                 8
> > > > +
> > > > + static void ath79_misc_irq_handler(struct irq_desc *desc)
> > > > + {
> > > > --
> > > > 2.7.4
> > > >
> >
> > _______________________________________________
> > openwrt-devel mailing list
> > openwrt-devel@lists.openwrt.org
> > https://lists.openwrt.org/mailman/listinfo/openwrt-devel

Dmitry Tunin Aug. 22, 2018, 10:02 p.m. UTC | #5

I think we need an "nr-interrupts" property. Each SoC has its own
number of interrupts. They can be handled by the same driver.
It is much better to have it explicitly set in DTS then having it
hidden in #define's in all kinds of strange places.

The property can be handled a way that if it is not set some default
maximum possible value is applied, like 32 in this case.
But we'll be able to set some number for each controller if we want it.
ср, 22 авг. 2018 г. в 15:35, Dmitry Tunin <hanipouspilot@gmail.com>:
>
> It allocates some RAM I guess.
> ср, 22 авг. 2018 г. в 15:34, Chuanhong Guo <gch981213@gmail.com>:
> >
> > Hi!
> > Dmitry Tunin <hanipouspilot@gmail.com> 于2018年8月22日周三 下午8:31写道：
> > >
> > > We probably need to add a SoC check there. Otherwise we'll have two 32
> > > IRQ domains when using it with PCI.
> > But this doesn't matter at all :)
> > > I guess older ones have 8 IRQs and newer ones - 16. We cal leave
> > > default of 32 for unknown SoCs if there are any.
> > > ср, 22 авг. 2018 г. в 13:59, Dmitry Tunin <hanipouspilot@gmail.com>:
> > > >
> > > > Oops. I looked into newer specs. Some chips now have 16.
> > > > ср, 22 авг. 2018 г. в 13:50, Dmitry Tunin <hanipouspilot@gmail.com>:
> > > > >
> > > > > According to specs this interrupt controller has 8 IRQs (0-7).
> > > > > If we reuse it for PCI, we need even less (0-4).
> > > > > We don't need that hude domain there.
> > > > >
> > > > > Signed-off-by: Dmitry Tunin <hanipouspilot@gmail.com>
> > > > > ---
> > > > >  .../0037-MIPS-ath79-irq-misc-reduce-irq-count.patch         | 13 +++++++++++++
> > > > >  1 file changed, 13 insertions(+)
> > > > >  create mode 100644 target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> > > > >
> > > > > diff --git a/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch b/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> > > > > new file mode 100644
> > > > > index 0000000..b9ab092
> > > > > --- /dev/null
> > > > > +++ b/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> > > > > @@ -0,0 +1,13 @@
> > > > > +Index: linux-4.14.65/drivers/irqchip/irq-ath79-misc.c
> > > > > +===================================================================
> > > > > +--- linux-4.14.65.orig/drivers/irqchip/irq-ath79-misc.c
> > > > > ++++ linux-4.14.65/drivers/irqchip/irq-ath79-misc.c
> > > > > +@@ -21,7 +21,7 @@
> > > > > + #define AR71XX_RESET_REG_MISC_INT_STATUS      0
> > > > > + #define AR71XX_RESET_REG_MISC_INT_ENABLE      4
> > > > > +
> > > > > +-#define ATH79_MISC_IRQ_COUNT                  32
> > > > > ++#define AR71XX_MISC_IRQ_COUNT                 8
> > > > > +
> > > > > + static void ath79_misc_irq_handler(struct irq_desc *desc)
> > > > > + {
> > > > > --
> > > > > 2.7.4
> > > > >
> > >
> > > _______________________________________________
> > > openwrt-devel mailing list
> > > openwrt-devel@lists.openwrt.org
> > > https://lists.openwrt.org/mailman/listinfo/openwrt-devel

[OpenWrt-Devel] ath79: reduce irq count in irq-ath79-misc.c

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