| Message ID | 20181015102503.30731-1-bjorn@mork.no |
|---|---|
| Headers | show |
| Series | Using the mainline mtk-eth-soc driver for MT7621 | expand |
On 15/10/2018 12:24, Bjørn Mork wrote: > This is NOT READY for merge. > > ( This code can also be found in a github branch, in case you find that > easier to review: > https://github.com/bmork/LEDE/tree/mt7621-with-mainline-eth-driver ) > > > Hoping for some early feedback in case what I am doing here is > completely out of the question. Which it very well might be... > > The primary questions are: > - Is it OK to rename the out-of-tree ramips ethernet directory to > avoid conflict with the mainline mediatek ethernet drivers? > - Is it OK to let the MT7621 use the mainline driver, while the rest > of the ramips target still use the out-of-tree > - If OK, is the method I use here fine, or is there some better way > to create a split of this type? > > My final goal is supporting MT7621 devices where the second ethernet > gmac is connected to something else than the internal switch. I have > one such device, the ZyXEL WAP6805, with a Quantenna 5G module > connected by RGMII to the MT7621. Patches for this device is included > primarily as an example of how the per-device driver change is done. > > Using the mainline driver also means converting to DSA, similar to the > mediatek target. So this also serves as an example of how that change > can be done (The recent discussion about DSA configration was the > trigger that made me submit this unfinished work now). Note that this > is for new devices only. Support for migrating existing configs to DSA > is not (yet) part of this work. > > > The first two patches in the series can be safely ignored by anyone > not specifically interested in the ZyXEL WAP6805. They only add basic > support for this device. > > The 3rd patch renames the out-of-tree driver directory from "mediatek" > to "ramips" to enable this driver to co-exist with the mainline > driver. > > Patch 4 imports all OpenWRT patches from the mediatek target, on the > assumption that the drivers for these two tagets should be kept in > sync. > > Patch 5 has all the necessary magic to acually enable MT7621 support > in the mainline driver. Please note how few these changes really are. > > Patch 6 works around an issue where the ethernet devices would lock up > due to a sofirq busy loop. I'll admit that I don't full understand the > issue, or why it should affect this driver and not the out-of-tree > version. But I wonder of this is really the issue seen by a number of > people reporting lockups and driver resets with MT7621? > > Patch 7 modifies the mt7621.dtsi to be compatible with the mainline > driver, while keeping compatibility with the out-of-tree driver. > > Patch 8 adds the mainline driver configuration as a virtual package, > enabling per-device switching from out-of-tree to mainline driver. > > Patch 9 shows how the changes necessary to switch the WAP6805 device > to the mainline driver. This serves as documentation of the > process. Most of the patch concerns adding DSA support to the DTS. have you seen my staging tree ? https://git.openwrt.org/?p=openwrt/staging/blogic.git;a=shortlog;h=refs/heads/mt7621_dsa i dont see the clk stuff in this series. do you have a "add mt7621 support to the driver" patch ? i am failing to see that, maybe i am just blind... sorry my patch is stuff needing annotation and a split up John > > Bjørn Mork (9): > wap6805: add Mitrastar uImage tool > wap6805: add board definition and DTS > ramips: rename out-of-tree net driver to "ralink" > mt7621: import mtk_eth_soc and mt7530 patches from the mediatek target > mt7621: enable mainline driver > mt7621: fix softirq loop > mt7621: update dtsi > mt7621 dsa: add virtual DSA kernel package > wap6805: use mtk-eth-soc driver with DSA > > include/image-commands.mk | 10 + > .../linux/ramips/base-files/etc/board.d/02_network | 3 + > .../ramips/base-files/etc/board.d/03_gpio_switches | 3 + > target/linux/ramips/base-files/lib/ramips.sh | 3 + > .../ramips/base-files/lib/upgrade/platform.sh | 6 +- > target/linux/ramips/dts/WAP6805.dts | 201 +++++ > target/linux/ramips/dts/mt7621.dtsi | 5 +- > .../drivers/net/ethernet/mediatek/Kconfig | 70 -- > .../drivers/net/ethernet/mediatek/Makefile | 22 - > .../files-4.14/drivers/net/ethernet/ralink/Kconfig | 70 ++ > .../drivers/net/ethernet/ralink/Makefile | 22 + > .../net/ethernet/{mediatek => ralink}/esw_rt3050.c | 0 > .../net/ethernet/{mediatek => ralink}/esw_rt3050.h | 2 +- > .../net/ethernet/{mediatek => ralink}/ethtool.c | 0 > .../net/ethernet/{mediatek => ralink}/ethtool.h | 0 > .../net/ethernet/{mediatek => ralink}/gsw_mt7620.c | 0 > .../net/ethernet/{mediatek => ralink}/gsw_mt7620.h | 0 > .../net/ethernet/{mediatek => ralink}/gsw_mt7621.c | 0 > .../net/ethernet/{mediatek => ralink}/mdio.c | 2 +- > .../net/ethernet/{mediatek => ralink}/mdio.h | 2 +- > .../ethernet/{mediatek => ralink}/mdio_mt7620.c | 0 > .../ethernet/{mediatek => ralink}/mdio_rt2880.c | 0 > .../ethernet/{mediatek => ralink}/mdio_rt2880.h | 0 > .../net/ethernet/{mediatek => ralink}/mt7530.c | 0 > .../net/ethernet/{mediatek => ralink}/mt7530.h | 0 > .../ethernet/{mediatek => ralink}/mtk_debugfs.c | 0 > .../ethernet/{mediatek => ralink}/mtk_eth_soc.c | 12 +- > .../ethernet/{mediatek => ralink}/mtk_eth_soc.h | 0 > .../ethernet/{mediatek => ralink}/mtk_offload.c | 6 +- > .../ethernet/{mediatek => ralink}/mtk_offload.h | 0 > .../net/ethernet/{mediatek => ralink}/soc_mt7620.c | 0 > .../net/ethernet/{mediatek => ralink}/soc_mt7621.c | 0 > .../net/ethernet/{mediatek => ralink}/soc_rt2880.c | 0 > .../net/ethernet/{mediatek => ralink}/soc_rt3050.c | 0 > .../net/ethernet/{mediatek => ralink}/soc_rt3883.c | 0 > target/linux/ramips/image/mt7621.mk | 25 +- > target/linux/ramips/modules.mk | 26 + > target/linux/ramips/mt7620/config-4.14 | 14 +- > target/linux/ramips/mt7621/config-4.14 | 13 +- > target/linux/ramips/mt76x8/config-4.14 | 10 +- > .../0027-net-next-mediatek-fix-DQL-support.patch | 92 ++ > ...iatek-add-support-for-GMAC2-wired-to-ext-.patch | 26 + > .../ramips/patches-4.14/0033-dsa-multi-cpu.patch | 268 ++++++ > ...5-net-mediatek-disable-RX-VLan-offloading.patch | 47 + > ...diatek-honour-special-tag-bit-inside-RX-D.patch | 50 ++ > ...diatek-enable-special-tag-indication-for-.patch | 41 + > ...a-mediatek-tell-GDMA-when-we-are-turning-.patch | 43 + > .../0046-net-mediatek-add-irq-delay.patch | 21 + > .../0051-net-mediatek-increase-tx_timeout.patch | 21 + > .../ramips/patches-4.14/0062-mdio-atomic.patch | 14 + > .../ramips/patches-4.14/0063-atomic-sleep.patch | 46 + > ...k-remove-superfluous-pin-setup-for-MT7622.patch | 102 +++ > .../ramips/patches-4.14/2200-mt7621-eth-dsa.patch | 121 +++ > .../2201-mt7621-eth-fix-napi-int.patch | 22 + > .../patches-4.14/700-add-net-ethernet-ralink.patch | 20 + > target/linux/ramips/rt288x/config-4.14 | 10 +- > target/linux/ramips/rt305x/config-4.14 | 8 +- > target/linux/ramips/rt3883/config-4.14 | 10 +- > tools/firmware-utils/Makefile | 1 + > tools/firmware-utils/src/mkmitrastar.c | 958 +++++++++++++++++++++ > 60 files changed, 2307 insertions(+), 141 deletions(-) > create mode 100644 target/linux/ramips/dts/WAP6805.dts > delete mode 100644 target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/Kconfig > delete mode 100644 target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/Makefile > create mode 100644 target/linux/ramips/files-4.14/drivers/net/ethernet/ralink/Kconfig > create mode 100644 target/linux/ramips/files-4.14/drivers/net/ethernet/ralink/Makefile > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/esw_rt3050.c (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/esw_rt3050.h (95%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/ethtool.c (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/ethtool.h (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/gsw_mt7620.c (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/gsw_mt7620.h (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/gsw_mt7621.c (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mdio.c (98%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mdio.h (96%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mdio_mt7620.c (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mdio_rt2880.c (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mdio_rt2880.h (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mt7530.c (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mt7530.h (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mtk_debugfs.c (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mtk_eth_soc.c (99%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mtk_eth_soc.h (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mtk_offload.c (99%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mtk_offload.h (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/soc_mt7620.c (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/soc_mt7621.c (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/soc_rt2880.c (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/soc_rt3050.c (100%) > rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/soc_rt3883.c (100%) > create mode 100644 target/linux/ramips/patches-4.14/0027-net-next-mediatek-fix-DQL-support.patch > create mode 100644 target/linux/ramips/patches-4.14/0032-net-dsa-mediatek-add-support-for-GMAC2-wired-to-ext-.patch > create mode 100644 target/linux/ramips/patches-4.14/0033-dsa-multi-cpu.patch > create mode 100644 target/linux/ramips/patches-4.14/0035-net-mediatek-disable-RX-VLan-offloading.patch > create mode 100644 target/linux/ramips/patches-4.14/0042-net-next-mediatek-honour-special-tag-bit-inside-RX-D.patch > create mode 100644 target/linux/ramips/patches-4.14/0043-net-next-mediatek-enable-special-tag-indication-for-.patch > create mode 100644 target/linux/ramips/patches-4.14/0044-net-next-dsa-mediatek-tell-GDMA-when-we-are-turning-.patch > create mode 100644 target/linux/ramips/patches-4.14/0046-net-mediatek-add-irq-delay.patch > create mode 100644 target/linux/ramips/patches-4.14/0051-net-mediatek-increase-tx_timeout.patch > create mode 100644 target/linux/ramips/patches-4.14/0062-mdio-atomic.patch > create mode 100644 target/linux/ramips/patches-4.14/0063-atomic-sleep.patch > create mode 100644 target/linux/ramips/patches-4.14/0175-net-mediatek-remove-superfluous-pin-setup-for-MT7622.patch > create mode 100644 target/linux/ramips/patches-4.14/2200-mt7621-eth-dsa.patch > create mode 100644 target/linux/ramips/patches-4.14/2201-mt7621-eth-fix-napi-int.patch > create mode 100644 target/linux/ramips/patches-4.14/700-add-net-ethernet-ralink.patch > create mode 100644 tools/firmware-utils/src/mkmitrastar.c >
John Crispin <john@phrozen.org> writes: > have you seen my staging tree ? > https://git.openwrt.org/?p=openwrt/staging/blogic.git;a=shortlog;h=refs/heads/mt7621_dsa No, I hadn't. Thanks for the pointer. Will look at it now I started out with Thirsty's work, but ended up redoing it all to try to keep changes as small and incremental as possible. But I did intend to credit him, as the original idea and concept is all Thirstys. Simply forgot. Sorry about that, Thirsty. > i dont see the clk stuff in this series. do you have a "add mt7621 > support to the driver" patch ? i am failing to see that, maybe i am > just blind... No, that's correct. I simply ignored the clk stuff after looking at how the driver used it (not at all). If you can get away with a simpler solution, then choose it ;-) Yes, I realize that this is probably simplifying a bit too much. The same goes for regulators, where I simply depend on the default dummy regulator instead of creating similar dummies. > sorry my patch is stuff needing annotation and a split up Then we're two... Including the boot log from the WAP6805 below to show the warnings etc caused by all my shortcuts. And if anyone wants to test this with a WAP6805 or WAP6806, then you also need to enable the RGMII connected Quantenna module: io -w -4 0x1e110008 0x9000c echo 1 > /sys/class/gpio/gpio16/value The gpio is probably enabling power to the slot, while the register write is still magic to me. I found it in the OEM firmware. The register appears to be somewhere in the ethernet FE block? The default value is 0xc000c. With that default I only see FCS errors, which leads me to wonder if this is somehow related to RGMII timing? Bjørn =================================================================== MT7621 stage1 code Mar 12 2015 14:42:52 (ASIC) CPU=50000000 HZ BUS=12500000 HZ ================================================================== Change MPLL source from XTAL to CR... do MEMPLL setting.. MEMPLL Config : 0x31000000 3PLL mode + External loopback === XTAL-40Mhz === DDR-800Mhz === PLL3 FB_DL: 0x4, 1/0 = 612/412 11000000 PLL4 FB_DL: 0xa, 1/0 = 549/475 29000000 PLL2 FB_DL: 0xf, 1/0 = 536/488 3D000000 do DDR setting..[00320381] Apply DDR2 Setting...(use default AC) 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 -------------------------------------------------------------------------------- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0007:| 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0008:| 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0009:| 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0010:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0011:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DRAMC_DQSCTL1[0e0]=1A000000 DRAMC_DQSGCTL[124]=80000000 rank 0 coarse = 8 rank 0 fine = 56 B:| 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 opt_dle value:8 DRAMC_DDR2CTL[07c]=40001203 DRAMC_PADCTL4[0e4]=00000015 DRAMC_DQIDLY1[210]=0A070707 DRAMC_DQIDLY2[214]=04040607 DRAMC_DQIDLY3[218]=08060705 DRAMC_DQIDLY4[21c]=08050A06 DRAMC_R0DELDLY[018]=00002E2E ================================================================== RX DQS perbit delay software calibration ================================================================== 1.0-15 bit dq delay value ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 7 6 7 7 5 5 3 3 5 6 10 | 5 7 5 8 4 5 -------------------------------------- ================================================================== 2.dqs window x=pass dqs delay value (min~max)center y=0-7bit DQ of every group input delay:DQS0 =46 DQS1 = 46 ================================================================== bit DQS0 bit DQS1 0 (1~91)46 8 (1~92)46 1 (1~90)45 9 (1~90)45 2 (1~92)46 10 (1~90)45 3 (1~86)43 11 (1~89)45 4 (0~89)44 12 (1~90)45 5 (1~90)45 13 (1~88)44 6 (1~89)45 14 (1~90)45 7 (1~90)45 15 (1~86)43 ================================================================== 3.dq delay value last ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 7 7 7 10 7 6 4 4 5 7 10 | 6 8 6 10 5 8 ================================================================== ================================================================== TX perbyte calibration ================================================================== DQS loop = 15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2 DQ loop=15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=2 byte:0, (DQS,DQ)=(8,8) byte:1, (DQS,DQ)=(8,8) DRAMC_DQODLY1[200]=88888888 DRAMC_DQODLY2[204]=88888888 20,data:88 [EMI] DRAMC calibration passed =================================================================== MT7621 stage1 code done CPU=50000000 HZ BUS=12500000 HZ =================================================================== Z-LOADER (Dec 1 2015 - 12:05:30) DRAM: 64 MB Config XHCI 40M PLL ****************************** Software System Reset Occurred ****************************** Allocate 16 byte aligned buffer: 83fe1dd0 Enable NFI Clock # MTK NAND # : Use HW ECC NAND ID [01 F1 80 1D 01] Device found in MTK table, ID: 1f1, EXT_ID: 801d01 Support this Device in MTK table! 1f1 select_chip [NAND]select ecc bit:4, sparesize :64 spare_per_sector=16 Signature matched and data read! load_fact_bbt success 1023 load fact bbt success [mtk_nand] probe successfully! mtd->writesize=2048 mtd->oobsize=64, mtd->erasesize=131072 devinfo.iowidth=8 ============================================ Ralink UBoot Version: 4.3.0.0 -------------------------------------------- ASIC MT7621AS (MAC to MT7530 Mode) DRAM_CONF_FROM: Auto-Detection DRAM_TYPE: DDR2 DRAM bus: 16 bit Xtal Mode=3 OCP Ratio=1/4 Flash component: NAND Flash Date:Dec 1 2015 Time:12:05:30 ============================================ icache: sets:256, ways:4, linesz:32 ,total:32768 dcache: sets:256, ways:4, linesz:32 ,total:32768 #Reset_MT7530 . Z-LOADER V1.17 | 12/01/2015 12:05:37 .... Waitting for RX_DMA_BUSY status Start... done wait multiboot... 5 4 3 2 1 0 Hit ESC key to stop autoboot: 3 2 1 0 ...............................## Booting image at c0000000 ... Image Name: MIPS OpenWrt Linux-4.14.75 Image Type: MIPS Linux Kernel Image (lzma compressed) Data Size: 1976572 Bytes = 1.9 MB Load Address: 80001000 Entry Point: 80001000 ............................... Verifying Checksum ... OK Uncompressing Kernel Image ... OK Starting kernel ... [ 0.000000] Linux version 4.14.75 (bjorn@canardo) (gcc version 7.3.0 (OpenWrt GCC 7.3.0 r6690-cd7878e69dc9)) #0 SMP Sun Oct 14 14:32:42 2018 [ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3 [ 0.000000] bootconsole [early0] enabled [ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc) [ 0.000000] MIPS: machine is ZyXEL WAP6805 [ 0.000000] Determined physical RAM map: [ 0.000000] memory: 04000000 @ 00000000 (usable) [ 0.000000] Initrd not found or empty - disabling initrd [ 0.000000] VPE topology {2} total 2 [ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.000000] Zone ranges: [ 0.000000] Normal [mem 0x0000000000000000-0x0000000003ffffff] [ 0.000000] HighMem empty [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000000000000-0x0000000003ffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000003ffffff] [ 0.000000] random: get_random_bytes called from start_kernel+0x90/0x4a4 with crng_init=0 [ 0.000000] percpu: Embedded 14 pages/cpu @81091000 s26192 r8192 d22960 u57344 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 16256 [ 0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2 [ 0.000000] PID hash table entries: 256 (order: -2, 1024 bytes) [ 0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes) [ 0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Writing ErrCtl register=00001c40 [ 0.000000] Readback ErrCtl register=00001c40 [ 0.000000] Memory: 58292K/65536K available (4615K kernel code, 260K rwdata, 1084K rodata, 236K init, 248K bss, 7244K reserved, 0K cma-reserved, 0K highmem) [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Hierarchical RCU implementation. [ 0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2 [ 0.000000] NR_IRQS: 256 [ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns [ 0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns [ 0.000010] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns [ 0.015490] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688) [ 0.087797] pid_max: default: 32768 minimum: 301 [ 0.097090] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.110106] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.125715] Hierarchical SRCU implementation. [ 0.136719] smp: Bringing up secondary CPUs ... [ 0.158307] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.158315] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.158327] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.158475] CPU1 revision is: 0001992f (MIPS 1004Kc) [ 0.205794] Synchronize counters for CPU 1: done. [ 0.265469] smp: Brought up 1 node, 2 CPUs [ 0.277397] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.296874] futex hash table entries: 512 (order: 2, 16384 bytes) [ 0.309096] pinctrl core: initialized pinctrl subsystem [ 0.320864] NET: Registered protocol family 16 [ 0.341032] pull PCIe RST: RALINK_RSTCTRL = 0 [ 0.650012] release PCIe RST: RALINK_RSTCTRL = 7000000 [ 0.660086] ***** Xtal 40MHz ***** [ 0.666810] release PCIe RST: RALINK_RSTCTRL = 7000000 [ 0.677014] Port 0 N_FTS = 1b105000 [ 0.683917] Port 1 N_FTS = 1b102800 [ 0.690838] Port 2 N_FTS = 1b102800 [ 1.849295] PCIE1 no card, disable it(RST&CLK) [ 1.857978] PCIE2 no card, disable it(RST&CLK) [ 1.866783] -> 21007f2 [ 1.871632] PCIE0 enabled [ 1.876813] PCI host bridge /pcie@1e140000 ranges: [ 1.886342] MEM 0x0000000060000000..0x000000006fffffff [ 1.896696] IO 0x000000001e160000..0x000000001e16ffff [ 1.907063] PCI coherence region base: 0xbfbf8000, mask/settings: 0x60000000 [ 1.933961] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 1.945292] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 1.956708] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 1.969300] PCI host bridge to bus 0000:00 [ 1.977342] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff] [ 1.990995] pci_bus 0000:00: root bus resource [io 0xffffffff] [ 2.002730] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0] [ 2.016212] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff] [ 2.033274] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000] [ 2.046302] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000] [ 2.060117] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff] [ 2.073598] pci 0000:00:00.0: BAR 1: assigned [mem 0x60100000-0x6010ffff] [ 2.087088] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff] [ 2.100552] pci 0000:00:00.0: PCI bridge to [bus 01] [ 2.110392] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] [ 2.126146] clocksource: Switched to clocksource GIC [ 2.137593] NET: Registered protocol family 2 [ 2.147083] TCP established hash table entries: 1024 (order: 0, 4096 bytes) [ 2.160823] TCP bind hash table entries: 1024 (order: 1, 8192 bytes) [ 2.173424] TCP: Hash tables configured (established 1024 bind 1024) [ 2.186160] UDP hash table entries: 256 (order: 1, 8192 bytes) [ 2.197665] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes) [ 2.210312] NET: Registered protocol family 1 [ 2.455858] 4 CPUs re-calibrate udelay(lpj = 2924544) [ 2.467120] Crashlog allocated RAM at address 0x3f00000 [ 2.477671] workingset: timestamp_bits=30 max_order=14 bucket_order=0 [ 2.499359] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 2.510904] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. [ 2.534161] io scheduler noop registered [ 2.541890] io scheduler deadline registered (default) [ 2.552990] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled [ 2.567234] console [ttyS0] disabled [ 2.574268] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 14, base_baud = 3125000) is a 16550A [ 2.592261] console [ttyS0] enabled [ 2.592261] console [ttyS0] enabled [ 2.606025] bootconsole [early0] disabled [ 2.606025] bootconsole [early0] disabled [ 2.622665] cacheinfo: Unable to detect cache hierarchy for CPU 0 [ 2.635713] MediaTek Nand driver init, version v2.1 Fix AHB virt2phys error [ 2.649786] Enable NFI Clock [ 2.655506] # MTK NAND # : Use HW ECC [ 2.662819] Device found in MTK table, ID: 1f1, EXT_ID: 801d01 [ 2.674431] Support this Device in MTK table! 1f1 [ 2.684159] [NAND]select ecc bit:4, sparesize :64 spare_per_sector=16 [ 2.697032] nand: device found, Manufacturer ID: 0x01, Chip ID: 0xf1 [ 2.709682] nand: AMD/Spansion NAND 128MiB 3,3V 8-bit [ 2.719740] nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 [ 2.734841] Scanning device for bad blocks [ 3.032553] 9 fixed-partitions partitions found on MTD device MT7621-NAND [ 3.046071] Creating 9 MTD partitions on "MT7621-NAND": [ 3.056485] 0x000000000000-0x000000100000 : "Bootloader" [ 3.068320] 0x000000100000-0x000000200000 : "MRD" [ 3.078871] 0x000000200000-0x000000300000 : "Factory" [ 3.090110] 0x000000300000-0x000000400000 : "Config" [ 3.101177] 0x000000400000-0x000002400000 : "firmware" [ 3.565737] 2 uimage-fw partitions found on MTD device firmware [ 3.577555] 0x000000400000-0x000000800000 : "kernel" [ 3.588639] 0x000000800000-0x000002400000 : "ubi" [ 3.599403] 0x000002400000-0x000004400000 : "Kernel2" [ 3.610876] 0x000004400000-0x000004500000 : "Private" [ 3.622133] 0x000004500000-0x000005500000 : "Log" [ 3.632811] 0x000005500000-0x000008000000 : "App" [ 3.643715] [mtk_nand] probe successfully! [ 3.652627] Signature matched and data read! [ 3.661127] load_fact_bbt success 1023 [ 3.669436] libphy: Fixed MDIO Bus: probed [ 3.715940] mtk_soc_eth 1e100000.ethernet: chip id = 7621 [ 3.727043] libphy: mdio: probed [ 3.733703] mt7530 mdio-bus:1f: mdio-bus:1f supply core not found, using dummy regulator [ 3.749963] mt7530 mdio-bus:1f: mdio-bus:1f supply io not found, using dummy regulator [ 3.766219] drivers/net/ethernet/mediatek/mtk_eth_soc.c:mtk_mdio_init[412]0 8393bc00 [ 3.783049] mtk_soc_eth 1e100000.ethernet: connected mac 0 to PHY at fixed-0:00 [uid=00000000, driver=Generic PHY] [ 3.804641] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 15 [ 3.821892] random: fast init done [ 3.822058] mtk_soc_eth 1e100000.ethernet: connected mac 1 to PHY at fixed-0:01 [uid=00000000, driver=Generic PHY] [ 3.822913] mtk_soc_eth 1e100000.ethernet eth1: mediatek frame engine at 0xbe100000, irq 15 [ 3.823454] Error: Driver 'mtk_soc_eth' is already registered, aborting... [ 3.825551] NET: Registered protocol family 10 [ 3.827743] Segment Routing with IPv6 [ 3.827871] NET: Registered protocol family 17 [ 3.828416] 8021q: 802.1Q VLAN Support v1.8 [ 3.830765] mt7530 mdio-bus:1f: mdio-bus:1f supply core not found, using dummy regulator [ 3.830879] mt7530 mdio-bus:1f: mdio-bus:1f supply io not found, using dummy regulator [ 3.831095] DSA: switch 0 0 parsed [ 3.831117] DSA: tree 0 parsed [ 5.626260] libphy: dsa slave smi: probed [ 5.665929] Generic PHY dsa-0.0:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=dsa-0.0:00, irq=POLL) [ 5.725929] Generic PHY dsa-0.0:01: attached PHY driver [Generic PHY] (mii_bus:phy_addr=dsa-0.0:01, irq=POLL) [ 5.785930] Generic PHY dsa-0.0:02: attached PHY driver [Generic PHY] (mii_bus:phy_addr=dsa-0.0:02, irq=POLL) [ 5.845932] Generic PHY dsa-0.0:03: attached PHY driver [Generic PHY] (mii_bus:phy_addr=dsa-0.0:03, irq=POLL) [ 5.868007] UBI: auto-attach mtd6 [ 5.874619] ubi0: attaching mtd6 [ 6.141136] ubi0: scanning is finished [ 6.163795] ubi0: attached mtd6 (name "ubi", size 28 MiB) [ 6.174626] ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes [ 6.188322] ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048 [ 6.201839] ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096 [ 6.215695] ubi0: good PEBs: 224, bad PEBs: 0, corrupted PEBs: 0 [ 6.227657] ubi0: user volume: 2, internal volumes: 1, max. volumes count: 128 [ 6.242040] ubi0: max/mean erase counter: 6/3, WL threshold: 4096, image sequence number: 1651423937 [ 6.260221] ubi0: available PEBs: 0, total reserved PEBs: 224, PEBs reserved for bad PEB handling: 20 [ 6.278604] ubi0: background thread "ubi_bgt0d" started, PID 392 [ 6.280588] block ubiblock0_0: created from ubi0:0(rootfs) [ 6.280600] ubiblock: device ubiblock0_0 (rootfs) set to be root filesystem [ 6.280621] hctosys: unable to open rtc device (rtc0) [ 6.331234] VFS: Mounted root (squashfs filesystem) readonly on device 254:0. [ 6.346249] Freeing unused kernel memory: 236K [ 6.355095] This architecture does not have kernel memory protection. [ 6.893763] init: Console is alive [ 6.900904] init: - watchdog - [ 7.563573] kmodloader: loading kernel modules from /etc/modules-boot.d/* [ 7.663551] usbcore: registered new interface driver usbfs [ 7.674625] usbcore: registered new interface driver hub [ 7.685347] usbcore: registered new device driver usb [ 7.709563] kmodloader: done loading kernel modules from /etc/modules-boot.d/* [ 7.726314] init: - preinit - /etc/preinit: line 26: swconfig: not found /etc/preinit: line 27: swconfig: not found /etc/preinit: line 28: swconfig: not found Press the [f] key and hit [enter] to enter failsafe mode Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level [ 11.552922] random: procd: uninitialized urandom read (4 bytes read) [ 11.566283] UBIFS (ubi0:1): background thread "ubifs_bgt0_1" started, PID 471 [ 11.627993] UBIFS (ubi0:1): recovery needed [ 11.804116] UBIFS (ubi0:1): recovery completed [ 11.813159] UBIFS (ubi0:1): UBIFS: mounted UBI device 0, volume 1, name "rootfs_data" [ 11.828766] UBIFS (ubi0:1): LEB size: 126976 bytes (124 KiB), min./max. I/O unit sizes: 2048 bytes/2048 bytes [ 11.848510] UBIFS (ubi0:1): FS size: 17014784 bytes (16 MiB, 134 LEBs), journal size 1015809 bytes (0 MiB, 7 LEBs) [ 11.869114] UBIFS (ubi0:1): reserved for root: 803650 bytes (784 KiB) [ 11.881950] UBIFS (ubi0:1): media format: w4/r0 (latest is w5/r0), UUID 3DE92ED0-10DC-4C9C-8241-6D4A461AB3E8, small LPT model [ 11.911128] mount_root: switching to ubifs overlay [ 11.949134] urandom-seed: Seeding with /etc/urandom.seed [ 12.049308] procd: - early - [ 12.055140] procd: - watchdog - [ 12.716077] procd: - watchdog - [ 12.722656] procd: - ubus - [ 12.790751] random: ubusd: uninitialized urandom read (4 bytes read) [ 12.808578] random: ubusd: uninitialized urandom read (4 bytes read) [ 12.821679] random: ubusd: uninitialized urandom read (4 bytes read) [ 12.835212] procd: - init - Please press Enter to activate this console. [ 13.166786] kmodloader: loading kernel modules from /etc/modules.d/* [ 13.183577] ip6_tables: (C) 2000-2006 Netfilter Core Team [ 13.203800] Loading modules backported from Linux version v4.19-rc5-0-g6bf4ca7fbc85 [ 13.219117] Backport generated by backports.git v4.19-rc5-1-0-g05571dcd [ 13.234642] ip_tables: (C) 2000-2006 Netfilter Core Team [ 13.252384] nf_conntrack version 0.5.0 (1024 buckets, 4096 max) [ 13.304247] xt_time: kernel timezone is -0000 [ 13.359356] bus=0x1, slot = 0x0, irq=0xff [ 13.367628] mt7603e 0000:01:00.0: ASIC revision: 76030010 [ 13.444049] mt7603e 0000:01:00.0: Firmware Version: ap_pcie [ 13.455227] mt7603e 0000:01:00.0: Build Time: 20160107100755 [ 13.505910] firmware init done [ 13.701965] PPP generic driver version 2.4.2 [ 13.712245] NET: Registered protocol family 24 [ 13.724214] kmodloader: done loading kernel modules from /etc/modules.d/* [ 14.515725] urandom_read: 5 callbacks suppressed [ 14.515743] random: jshn: uninitialized urandom read (4 bytes read) [ 19.171631] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 19.183471] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 19.407767] br-lan: port 1(lan0) entered blocking state [ 19.418321] br-lan: port 1(lan0) entered disabled state [ 19.496064] device lan0 entered promiscuous mode [ 19.505301] device eth0 entered promiscuous mode [ 19.646609] IPv6: ADDRCONF(NETDEV_UP): br-lan: link is not ready [ 19.886953] br-lan: port 2(lan1) entered blocking state [ 19.897420] br-lan: port 2(lan1) entered disabled state [ 20.025938] device lan1 entered promiscuous mode [ 20.416933] br-lan: port 3(lan2) entered blocking state [ 20.427437] br-lan: port 3(lan2) entered disabled state [ 20.635930] device lan2 entered promiscuous mode [ 21.006986] br-lan: port 4(lan3) entered blocking state [ 21.017453] br-lan: port 4(lan3) entered disabled state [ 21.295940] device lan3 entered promiscuous mode [ 21.486068] mt7530 mdio-bus:1f lan0: Link is Down [ 21.686083] mt7530 mdio-bus:1f lan1: Link is Down [ 22.276003] mt7530 mdio-bus:1f lan2: Link is Down [ 22.865915] mt7530 mdio-bus:1f lan3: Link is Down [ 25.105975] br-lan: port 4(lan3) entered blocking state [ 25.116405] br-lan: port 4(lan3) entered forwarding state [ 25.145931] mt7530 mdio-bus:1f lan3: Link is Up - 1Gbps/Full - flow control rx/tx [ 25.275940] IPv6: ADDRCONF(NETDEV_CHANGE): br-lan: link becomes ready root@OpenWrt:/# ifconfig eth1 1.1.1.1 netmask 255.255.255.0 up root@OpenWrt:/# io -w -4 0x1e110008 0x9000c root@OpenWrt:/# echo 1 > /sys/class/gpio/gpio16/value root@OpenWrt:/# ping 1.1.1.2 -c 3 PING 1.1.1.2 (1.1.1.2): 56 data bytes 64 bytes from 1.1.1.2: seq=0 ttl=64 time=2.503 ms 64 bytes from 1.1.1.2: seq=1 ttl=64 time=0.698 ms 64 bytes from 1.1.1.2: seq=2 ttl=64 time=0.647 ms --- 1.1.1.2 ping statistics --- 3 packets transmitted, 3 packets received, 0% packet loss round-trip min/avg/max = 0.647/1.282/2.503 ms
Bjørn Mork <bjorn@mork.no> writes: > John Crispin <john@phrozen.org> writes: > >> have you seen my staging tree ? >> https://git.openwrt.org/?p=openwrt/staging/blogic.git;a=shortlog;h=refs/heads/mt7621_dsa > > No, I hadn't. Thanks for the pointer. Will look at it now I've now tried to build this with the WAP6805, but I'm afraid I can't get the second gmac to work. Probably something I did wrong with the DTS... DSA and eth0 seems to work fine. This is your mt7621_dsa branc with my attempt to use it on the WAP6805 on top: https://github.com/bmork/LEDE/tree/blogic-mt7621-mainline-eth Boot log, with failing attempt to use eth1: [ 0.000000] Linux version 4.14.61 (bjorn@canardo) (gcc version 7.3.0 (OpenWrt GCC 7.3.0 r6690-cd7878e69dc9)) #0 SMP Mon Oct 15 11:57:33 2018 [ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3 [ 0.000000] bootconsole [early0] enabled [ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc) [ 0.000000] MIPS: machine is ZyXEL WAP6805 [ 0.000000] Determined physical RAM map: [ 0.000000] memory: 04000000 @ 00000000 (usable) [ 0.000000] Initrd not found or empty - disabling initrd [ 0.000000] VPE topology {2} total 2 [ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.000000] Zone ranges: [ 0.000000] Normal [mem 0x0000000000000000-0x0000000003ffffff] [ 0.000000] HighMem empty [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000000000000-0x0000000003ffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000003ffffff] [ 0.000000] random: get_random_bytes called from start_kernel+0x90/0x4a4 with crng_init=0 [ 0.000000] percpu: Embedded 14 pages/cpu @81090000 s26192 r8192 d22960 u57344 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 16256 [ 0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2 [ 0.000000] PID hash table entries: 256 (order: -2, 1024 bytes) [ 0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes) [ 0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Writing ErrCtl register=0001164a [ 0.000000] Readback ErrCtl register=0001164a [ 0.000000] Memory: 58324K/65536K available (4573K kernel code, 214K rwdata, 1084K rodata, 260K init, 284K bss, 7212K reserved, 0K cma-reserved, 0K highmem) [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Hierarchical RCU implementation. [ 0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2 [ 0.000000] NR_IRQS: 256 [ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns [ 0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns [ 0.000009] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns [ 0.015493] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688) [ 0.087794] pid_max: default: 32768 minimum: 301 [ 0.097092] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.110108] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.125717] Hierarchical SRCU implementation. [ 0.136751] smp: Bringing up secondary CPUs ... [ 0.149955] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.149963] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.149974] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.150122] CPU1 revision is: 0001992f (MIPS 1004Kc) [ 0.205824] Synchronize counters for CPU 1: done. [ 0.265496] smp: Brought up 1 node, 2 CPUs [ 0.277227] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.296702] futex hash table entries: 512 (order: 2, 16384 bytes) [ 0.308929] pinctrl core: initialized pinctrl subsystem [ 0.320656] NET: Registered protocol family 16 [ 0.340951] pull PCIe RST: RALINK_RSTCTRL = 0 [ 0.649952] release PCIe RST: RALINK_RSTCTRL = 7000000 [ 0.660019] ***** Xtal 40MHz ***** [ 0.666746] release PCIe RST: RALINK_RSTCTRL = 7000000 [ 0.676955] Port 0 N_FTS = 1b102800 [ 0.683853] Port 1 N_FTS = 1b102800 [ 0.690781] Port 2 N_FTS = 1b102800 [ 1.849206] PCIE1 no card, disable it(RST&CLK) [ 1.857893] PCIE2 no card, disable it(RST&CLK) [ 1.866693] -> 21007f2 [ 1.871541] PCIE0 enabled [ 1.876726] PCI host bridge /pcie@1e140000 ranges: [ 1.886249] MEM 0x0000000060000000..0x000000006fffffff [ 1.896613] IO 0x000000001e160000..0x000000001e16ffff [ 1.906971] PCI coherence region base: 0xbfbf8000, mask/settings: 0x60000000 [ 1.933546] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 1.944851] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 1.956081] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 1.968660] PCI host bridge to bus 0000:00 [ 1.976694] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff] [ 1.990343] pci_bus 0000:00: root bus resource [io 0xffffffff] [ 2.002078] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0] [ 2.015559] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff] [ 2.031804] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 2.048331] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000] [ 2.061351] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000] [ 2.075179] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff] [ 2.088653] pci 0000:00:00.0: BAR 1: assigned [mem 0x60100000-0x6010ffff] [ 2.102137] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff] [ 2.115617] pci 0000:00:00.0: PCI bridge to [bus 01] [ 2.125442] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] [ 2.140543] clocksource: Switched to clocksource GIC [ 2.152105] NET: Registered protocol family 2 [ 2.161585] TCP established hash table entries: 1024 (order: 0, 4096 bytes) [ 2.175325] TCP bind hash table entries: 1024 (order: 1, 8192 bytes) [ 2.187926] TCP: Hash tables configured (established 1024 bind 1024) [ 2.200664] UDP hash table entries: 256 (order: 1, 8192 bytes) [ 2.212170] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes) [ 2.224839] NET: Registered protocol family 1 [ 2.470500] 4 CPUs re-calibrate udelay(lpj = 2924544) [ 2.481798] Crashlog allocated RAM at address 0x3f00000 [ 2.492635] workingset: timestamp_bits=30 max_order=14 bucket_order=0 [ 2.514307] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 2.525843] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. [ 2.549358] io scheduler noop registered [ 2.557036] io scheduler deadline registered (default) [ 2.569152] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled [ 2.583242] console [ttyS0] disabled [ 2.590259] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 14, base_baud = 3125000) is a 16550A [ 2.608298] console [ttyS0] enabled [ 2.608298] console [ttyS0] enabled [ 2.622022] bootconsole [early0] disabled [ 2.622022] bootconsole [early0] disabled [ 2.638724] cacheinfo: Unable to detect cache hierarchy for CPU 0 [ 2.651776] MediaTek Nand driver init, version v2.1 Fix AHB virt2phys error [ 2.665820] Enable NFI Clock [ 2.671555] # MTK NAND # : Use HW ECC [ 2.678848] Device found in MTK table, ID: 1f1, EXT_ID: 801d01 [ 2.690455] Support this Device in MTK table! 1f1 [ 2.700169] [NAND]select ecc bit:4, sparesize :64 spare_per_sector=16 [ 2.713039] nand: device found, Manufacturer ID: 0x01, Chip ID: 0xf1 [ 2.725682] nand: AMD/Spansion NAND 128MiB 3,3V 8-bit [ 2.735733] nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 [ 2.750817] Scanning device for bad blocks [ 3.048548] 9 fixed-partitions partitions found on MTD device MT7621-NAND [ 3.062061] Creating 9 MTD partitions on "MT7621-NAND": [ 3.072466] 0x000000000000-0x000000100000 : "Bootloader" [ 3.084267] 0x000000100000-0x000000200000 : "MRD" [ 3.094785] 0x000000200000-0x000000300000 : "Factory" [ 3.105940] 0x000000300000-0x000000400000 : "Config" [ 3.116943] 0x000000400000-0x000002400000 : "firmware" [ 3.581855] 2 uimage-fw partitions found on MTD device firmware [ 3.593665] 0x000000400000-0x000000800000 : "kernel" [ 3.604717] 0x000000800000-0x000002400000 : "ubi" [ 3.615420] 0x000002400000-0x000004400000 : "Kernel2" [ 3.626882] 0x000004400000-0x000004500000 : "Private" [ 3.638082] 0x000004500000-0x000005500000 : "Log" [ 3.648736] 0x000005500000-0x000008000000 : "App" [ 3.659601] [mtk_nand] probe successfully! [ 3.668497] Signature matched and data read! [ 3.676992] load_fact_bbt success 1023 [ 3.685736] libphy: Fixed MDIO Bus: probed [ 3.730549] MT7621: GE2: Pininit [ 3.736988] MTK_GDMA_FWD_CFG: 0, 544276480 [ 3.745138] MTK_GDMA_FWD_CFG: 1, 544276480 [ 3.753304] mtk_soc_eth 1e100000.ethernet: chip id = 7621 [ 3.764061] mtk_soc_eth 1e100000.ethernet: mtk_add_mac [ 3.774333] mtk_soc_eth 1e100000.ethernet: mtk_add_mac done [ 3.785430] mtk_soc_eth 1e100000.ethernet: mtk_add_mac [ 3.795671] mtk_soc_eth 1e100000.ethernet: mtk_add_mac done [ 3.807023] libphy: mdio: probed [ 3.814796] mtk_soc_eth 1e100000.ethernet: connected mac 0 to PHY at fixed-0:00 [uid=00000000, driver=Generic PHY] [ 3.836317] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 15 [ 3.853782] mtk_soc_eth 1e100000.ethernet: connected mac 1 to PHY at fixed-0:01 [uid=00000000, driver=Generic PHY] [ 3.875257] mtk_soc_eth 1e100000.ethernet eth1: mediatek frame engine at 0xbe100000, irq 15 [ 3.893875] random: fast init done [ 3.894557] NET: Registered protocol family 10 [ 3.896907] Segment Routing with IPv6 [ 3.897031] NET: Registered protocol family 17 [ 3.897588] 8021q: 802.1Q VLAN Support v1.8 [ 3.900770] DSA: switch 0 0 parsed [ 3.900793] DSA: tree 0 parsed [ 4.870626] mtk_soc_eth 1e100000.ethernet eth1: rx pause enabled, tx pause enabled [ 4.870634] mtk_soc_eth 1e100000.ethernet eth0: rx pause enabled, tx pause enabled [ 4.870653] mtk_phy_link_adjust: 0, 105e33b [ 4.909076] mtk_phy_link_adjust: 1, 105e33b [ 5.730890] libphy: dsa slave smi: probed [ 5.770566] Generic PHY dsa-0.0:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=dsa-0.0:00, irq=POLL) [ 5.830554] Generic PHY dsa-0.0:01: attached PHY driver [Generic PHY] (mii_bus:phy_addr=dsa-0.0:01, irq=POLL) [ 5.890554] Generic PHY dsa-0.0:02: attached PHY driver [Generic PHY] (mii_bus:phy_addr=dsa-0.0:02, irq=POLL) [ 5.950554] Generic PHY dsa-0.0:03: attached PHY driver [Generic PHY] (mii_bus:phy_addr=dsa-0.0:03, irq=POLL) [ 5.972592] UBI: auto-attach mtd6 [ 5.979205] ubi0: attaching mtd6 [ 6.053168] UBI: EOF marker found, PEBs from 58 will be erased [ 6.065019] ubi0: scanning is finished [ 6.111778] ubi0: volume 1 ("rootfs_data") re-sized from 9 to 144 LEBs [ 6.125732] ubi0: attached mtd6 (name "ubi", size 28 MiB) [ 6.136520] ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes [ 6.150207] ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048 [ 6.163725] ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096 [ 6.177582] ubi0: good PEBs: 224, bad PEBs: 0, corrupted PEBs: 0 [ 6.189533] ubi0: user volume: 2, internal volumes: 1, max. volumes count: 128 [ 6.203909] ubi0: max/mean erase counter: 1/0, WL threshold: 4096, image sequence number: 1643424424 [ 6.222088] ubi0: available PEBs: 0, total reserved PEBs: 224, PEBs reserved for bad PEB handling: 20 [ 6.240464] ubi0: background thread "ubi_bgt0d" started, PID 396 [ 6.242434] block ubiblock0_0: created from ubi0:0(rootfs) [ 6.242446] ubiblock: device ubiblock0_0 (rootfs) set to be root filesystem [ 6.242467] hctosys: unable to open rtc device (rtc0) [ 6.305864] VFS: Mounted root (squashfs filesystem) readonly on device 254:0. [ 6.320984] Freeing unused kernel memory: 260K [ 6.329836] This architecture does not have kernel memory protection. [ 6.926057] init: Console is alive [ 6.933192] init: - watchdog - [ 7.589472] kmodloader: loading kernel modules from /etc/modules-boot.d/* [ 7.689170] usbcore: registered new interface driver usbfs [ 7.700252] usbcore: registered new interface driver hub [ 7.710992] usbcore: registered new device driver usb [ 7.735257] kmodloader: done loading kernel modules from /etc/modules-boot.d/* [ 7.750945] init: - preinit - [ 8.620693] IPv6: ADDRCONF(NETDEV_UP): lan0: link is not ready [ 8.645278] random: procd: uninitialized urandom read (4 bytes read) Press the [f] key and hit [enter] to enter failsafe mode Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level [ 9.840561] mt7530 switch@0 lan0: Link is Down [ 11.822218] UBIFS (ubi0:1): default file-system created [ 11.834107] UBIFS (ubi0:1): background thread "ubifs_bgt0_1" started, PID 473 [ 11.947379] UBIFS (ubi0:1): UBIFS: mounted UBI device 0, volume 1, name "rootfs_data" [ 11.963006] UBIFS (ubi0:1): LEB size: 126976 bytes (124 KiB), min./max. I/O unit sizes: 2048 bytes/2048 bytes [ 11.982757] UBIFS (ubi0:1): FS size: 17014784 bytes (16 MiB, 134 LEBs), journal size 1015809 bytes (0 MiB, 7 LEBs) [ 12.003378] UBIFS (ubi0:1): reserved for root: 803650 bytes (784 KiB) [ 12.016215] UBIFS (ubi0:1): media format: w4/r0 (latest is w5/r0), UUID 065D734F-7CDE-4197-A7C1-56AE43FAAC23, small LPT model [ 12.041954] mount_root: overlay filesystem has not been fully initialized yet [ 12.056855] mount_root: switching to ubifs overlay [ 12.085378] urandom-seed: Seed file not found (/etc/urandom.seed) [ 12.347762] procd: - early - [ 12.353663] procd: - watchdog - [ 13.020710] procd: - watchdog - [ 13.027289] procd: - ubus - [ 13.093359] random: ubusd: uninitialized urandom read (4 bytes read) [ 13.106890] random: ubusd: uninitialized urandom read (4 bytes read) [ 13.120046] random: ubusd: uninitialized urandom read (4 bytes read) [ 13.133620] procd: - init - Please press Enter to activate this console. [ 13.429847] kmodloader: loading kernel modules from /etc/modules.d/* [ 13.446761] ip6_tables: (C) 2000-2006 Netfilter Core Team [ 13.787813] Loading modules backported from Linux version v4.18-rc7-0-gacb1872577b3 [ 13.803124] Backport generated by backports.git v4.14-rc2-1-71-g39f4ec76 [ 13.818511] ip_tables: (C) 2000-2006 Netfilter Core Team [ 14.145390] nf_conntrack version 0.5.0 (1024 buckets, 4096 max) [ 14.358655] xt_time: kernel timezone is -0000 [ 14.588024] bus=0x1, slot = 0x0, irq=0xff [ 14.596099] PCI: Enabling device 0000:00:00.0 (0004 -> 0006) [ 14.607542] mt7603e 0000:01:00.0: ASIC revision: 76030010 [ 14.684569] mt7603e 0000:01:00.0: Firmware Version: ap_pcie [ 14.695703] mt7603e 0000:01:00.0: Build Time: 20160107100755 [ 14.740548] firmware init done [ 14.936146] PPP generic driver version 2.4.2 [ 14.948267] NET: Registered protocol family 24 [ 14.962142] kmodloader: done loading kernel modules from /etc/modules.d/* [ 16.167329] urandom_read: 5 callbacks suppressed [ 16.167342] random: jshn: uninitialized urandom read (4 bytes read) [ 23.171865] mtk_soc_eth 1e100000.ethernet eth0: rx pause enabled, tx pause enabled [ 23.186993] mtk_phy_link_adjust: 0, 105e33b [ 23.422099] br-lan: port 1(lan0) entered blocking state [ 23.432608] br-lan: port 1(lan0) entered disabled state [ 23.500740] device lan0 entered promiscuous mode [ 23.509945] device eth0 entered promiscuous mode [ 23.641328] IPv6: ADDRCONF(NETDEV_UP): br-lan: link is not ready [ 23.892294] br-lan: port 2(lan1) entered blocking state [ 23.902811] br-lan: port 2(lan1) entered disabled state [ 24.040604] device lan1 entered promiscuous mode [ 24.431933] br-lan: port 3(lan2) entered blocking state [ 24.442392] br-lan: port 3(lan2) entered disabled state [ 24.670573] device lan2 entered promiscuous mode [ 25.062164] br-lan: port 4(lan3) entered blocking state [ 25.072679] br-lan: port 4(lan3) entered disabled state [ 25.370585] device lan3 entered promiscuous mode [ 25.680667] mt7530 switch@0 lan1: Link is Down [ 26.300584] mt7530 switch@0 lan2: Link is Down [ 26.700664] mt7530 switch@0 lan3: Link is Down [ 30.060634] br-lan: port 4(lan3) entered blocking state [ 30.071087] br-lan: port 4(lan3) entered forwarding state [ 30.100576] mt7530 switch@0 lan3: Link is Up - 1Gbps/Full - flow control rx/tx [ 30.260595] IPv6: ADDRCONF(NETDEV_CHANGE): br-lan: link becomes ready root@OpenWrt:/# io -w -4 0x1e110008 0x9000c root@OpenWrt:/# echo 1 > /sys/class/gpio/gpio16/value root@OpenWrt:/# ifconfig eth1 1.1.1.1 netmask 255.255.255.0 up root@OpenWrt:/# ping 1.1.1.2 -c 3 PING 1.1.1.2 (1.1.1.2): 56 data bytes --- 1.1.1.2 ping statistics --- 3 packets transmitted, 0 packets received, 100% packet loss root@OpenWrt:/# ifconfig eth1 eth1 Link encap:Ethernet HWaddr 60:31:97:66:16:11 inet addr:1.1.1.1 Bcast:1.1.1.255 Mask:255.255.255.0 inet6 addr: fe80::6231:97ff:fe66:1611/64 Scope:Link UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:13 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:0 (0.0 B) TX bytes:1238 (1.2 KiB) Interrupt:15
Bjørn Mork <bjorn@mork.no> writes: > Bjørn Mork <bjorn@mork.no> writes: >> John Crispin <john@phrozen.org> writes: >> >>> have you seen my staging tree ? >>> https://git.openwrt.org/?p=openwrt/staging/blogic.git;a=shortlog;h=refs/heads/mt7621_dsa >> >> No, I hadn't. Thanks for the pointer. Will look at it now > > > I've now tried to build this with the WAP6805, but I'm afraid I can't > get the second gmac to work. Probably something I did wrong with the > DTS... DSA and eth0 seems to work fine. > > This is your mt7621_dsa branc with my attempt to use it on the WAP6805 > on top: https://github.com/bmork/LEDE/tree/blogic-mt7621-mainline-eth FWIW, I experimented a bit by removing code I didn't understand. There was some hardcoded initialisation in mtk_hw_init() which didn't look very reassuring. And what do you know? Removing it made the second gmac work in my device. I've added the removal patch to the branch on github. And it's attached here as well. Comments appreciated. Bjørn From a926747f15681b680e8e341dfbc7959af1878f71 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bj=C3=B8rn=20Mork?= <bjorn@mork.no> Date: Mon, 15 Oct 2018 19:01:11 +0200 Subject: [PATCH] mt7621: test mtk_hw_init() hunk MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Bjørn Mork <bjorn@mork.no> --- .../202-Adding-MT7621-DSA-support.patch | 36 ---------------------- target/linux/ramips/patches-4.14/205-mtk-eth.patch | 34 -------------------- 2 files changed, 70 deletions(-) diff --git a/target/linux/ramips/patches-4.14/202-Adding-MT7621-DSA-support.patch b/target/linux/ramips/patches-4.14/202-Adding-MT7621-DSA-support.patch index f1cfa07e7415..b01c03610970 100644 --- a/target/linux/ramips/patches-4.14/202-Adding-MT7621-DSA-support.patch +++ b/target/linux/ramips/patches-4.14/202-Adding-MT7621-DSA-support.patch @@ -198,42 +198,6 @@ Index: linux-4.14.61/drivers/net/ethernet/mediatek/mtk_eth_soc.c mtk_tx_irq_enable(eth, MTK_TX_DONE_INT); mtk_rx_irq_enable(eth, MTK_RX_DONE_INT); } -@@ -1953,6 +1989,27 @@ static int mtk_hw_init(struct mtk_eth *e - } - regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val); - -+#ifdef CONFIG_SOC_MT7621 -+ -+#define SYSC_PAD_RGMII2_MDIO 0x58 -+#define SYSC_GPIO_MODE 0x60 -+#define SYSC_REG_CFG1 0x14 -+ printk("MT7621: GE2: Pininit\n"); -+ -+ /* reduce RGMII1 PAD driving strength */ -+ regmap_read(eth->ethsys, SYSC_PAD_RGMII2_MDIO, &val); -+ // MDIO -+ val &= ~(3 << 4); -+ // RGMII2, 12mA -+ val &= ~(3 <<20); -+ val |= (2 << 20); -+ regmap_write(eth->ethsys, SYSC_PAD_RGMII2_MDIO, val); -+ -+ /* gpio mux - RGMII1&RGMII2=Normal mode, set GMAC1,2 RGMII mode */ -+ regmap_read(eth->ethsys, SYSC_GPIO_MODE, &val); -+ val &= ~(BIT(14) | BIT(15) | 3 << 12 | 3 << 14); -+ regmap_write(eth->ethsys, SYSC_GPIO_MODE, val); -+#else - if (eth->pctl) { - /* Set GE2 driving and slew rate */ - regmap_write(eth->pctl, GPIO_DRV_SEL10, 0xa00); -@@ -1963,6 +2020,7 @@ static int mtk_hw_init(struct mtk_eth *e - /* set GE2 TUNE */ - regmap_write(eth->pctl, GPIO_BIAS_CTRL, 0x0); - } -+#endif - - /* Set linkdown as the default for each GMAC. Its own MCR would be set - * up with the more appropriate value when mtk_phy_link_adjust call is @@ -2548,13 +2606,15 @@ static int mtk_probe(struct platform_dev } } diff --git a/target/linux/ramips/patches-4.14/205-mtk-eth.patch b/target/linux/ramips/patches-4.14/205-mtk-eth.patch index 19072a5d8b28..dccc23c4e7be 100644 --- a/target/linux/ramips/patches-4.14/205-mtk-eth.patch +++ b/target/linux/ramips/patches-4.14/205-mtk-eth.patch @@ -37,40 +37,6 @@ Index: linux-4.14.61/drivers/net/ethernet/mediatek/mtk_eth_soc.c val &= ~SYSCFG0_GE_MODE(SYSCFG0_GE_MASK, eth->mac[i]->id); val |= SYSCFG0_GE_MODE(eth->mac[i]->ge_mode, eth->mac[i]->id); } -@@ -1998,17 +2002,26 @@ static int mtk_hw_init(struct mtk_eth *e - - /* reduce RGMII1 PAD driving strength */ - regmap_read(eth->ethsys, SYSC_PAD_RGMII2_MDIO, &val); -- // MDIO -+ // MDIO driving 2mA - val &= ~(3 << 4); -- // RGMII2, 12mA -- val &= ~(3 <<20); -- val |= (2 << 20); -- regmap_write(eth->ethsys, SYSC_PAD_RGMII2_MDIO, val); - -- /* gpio mux - RGMII1&RGMII2=Normal mode, set GMAC1,2 RGMII mode */ -+ if (eth->mac[1]) { -+ // When 2nd MAC is enabled set pin strength. -+ // RGMII2, 12mA -+ val &= ~(3 <<20); -+ val |= (2 << 20); -+ regmap_write(eth->ethsys, SYSC_PAD_RGMII2_MDIO, val); -+ }; -+ -+ /* set GMAC1,2 RGMII mode */ - regmap_read(eth->ethsys, SYSC_GPIO_MODE, &val); -- val &= ~(BIT(14) | BIT(15) | 3 << 12 | 3 << 14); -+ val &= ~(3<<12); // MDIO_MODE = MDIO -+ val &= ~(BIT(15) | BIT(14)); // RGMIIx GPIO MODE = RGMIIx -+ if (!eth->mac[1]) -+ val |= BIT(15); - regmap_write(eth->ethsys, SYSC_GPIO_MODE, val); -+ -+ - #else - if (eth->pctl) { - /* Set GE2 driving and slew rate */ @@ -2055,7 +2068,7 @@ static int mtk_hw_init(struct mtk_eth *e mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2); mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
Hi Bjørn, I was also working on this. 2 months ago. I also could not get 2nd GMAC to work with the external phy. See also my last commit https://github.com/vDorst/openwrt/commit/bf599736920cffa93ca29c455f933acdd12010ed But using port 5 of the switch is a good start. This makes port usable. I hope that we can collaborate, I want to pick it up again. So that I can my Ubiquiti ER-X-SFP. Greats, René
René van Dorst <opensource@vdorst.com> writes: > Hi Bjørn, > > I was also working on this. 2 months ago. > > I also could not get 2nd GMAC to work with the external phy. > See also my last commit https://github.com/vDorst/openwrt/commit/bf599736920cffa93ca29c455f933acdd12010ed > > But using port 5 of the switch is a good start. > This makes port usable. > > I hope that we can collaborate, I want to pick it up again. > > So that I can my Ubiquiti ER-X-SFP. Yes, I remember seeing that. I'm afraid this is way over my head. My understanding of the MT7621 SoC and the different hardware configurations is limited. IIUC there are basically two ways to connect the 2nd CPU GMAC: 1) by RGMII to something outside the SoC 2) to a port on the SoC internal switch, similar to the 1st GMAC What I have been able to get working is 1). I have not experimented with 2). But I guess that is what you want, since the SFP is connected to the switch on the ER-X-SFP? This is probably related to the magic register settings I had to disable to get my device working. I assume the real fix is to make the driver DTRT based on the DTS. Not sure I have the correct picture of the MT7621 though. Either I am stupid or this is explained confusingly in the docs I've seen... A little of both probably. Bjørn
Quoting Bjørn Mork <bjorn@mork.no>: > I'm afraid this is way over my head. My understanding of the MT7621 SoC > and the different hardware configurations is limited. IIUC there are > basically two ways to connect the 2nd CPU GMAC: > 1) by RGMII to something outside the SoC > 2) to a port on the SoC internal switch, similar to the 1st GMAC > You have even more options. I think these are the most common. a) GMAC2 disabled; P5 -> RGMII (external phy) b) GMAC2 -> switch P5 -> switch P0/P4 c) GMAC2 -> RGMII (external phy) a) In my code this is working. With this option you can get 1G HNAT wire-speed between wan and lan. b) is great to support. P0 or P4 = wan port of the device. With this option you can get 2G HNAT wire-speed. c) is great for me and other users which uses the external phy as wan port. RGMII = wan port of the device. With this option you also can get 2G HNAT wire-speed. > What I have been able to get working is 1). I have not experimented > with 2). But I guess that is what you want, since the SFP is connected > to the switch on the ER-X-SFP? Did you get any data on your network? On ER-X-SFP sfp port is connected like: SFP port -> SGMII -> external phy (at8035) -> RGMII -> MT7621 RGMII2 In my case 2nd GMAC did work in linux but no real data comes in or out the device. Probably of some hardware setting that I have missed. > This is probably related to the magic register settings I had to disable > to get my device working. I assume the real fix is to make the driver > DTRT based on the DTS. I think option a is for now the best option to get supported in openwrt. This works for both of us. John was busy to refactor my code to get it upstream. Because of lack of time it is still not done. Next step could be enabling the 2nd GMAC and try to implement the option above. > Not sure I have the correct picture of the MT7621 though. Either I am > stupid or this is explained confusingly in the docs I've seen... A > little of both probably. Lack of the offical and compleet documents and time are for me the main issue it is still not working. > Bjørn BTW. Do you have some more info about WAP6805? Not many hits on Google. Greats, René
René van Dorst <opensource@vdorst.com> writes: > Quoting Bjørn Mork <bjorn@mork.no>: > >> I'm afraid this is way over my head. My understanding of the MT7621 SoC >> and the different hardware configurations is limited. IIUC there are >> basically two ways to connect the 2nd CPU GMAC: >> 1) by RGMII to something outside the SoC >> 2) to a port on the SoC internal switch, similar to the 1st GMAC >> > > You have even more options. I think these are the most common. > a) GMAC2 disabled; P5 -> RGMII (external phy) > b) GMAC2 -> switch P5 -> switch P0/P4 > c) GMAC2 -> RGMII (external phy) > > > a) In my code this is working. With this option you can get 1G HNAT > wire-speed > between wan and lan. > b) is great to support. P0 or P4 = wan port of the device. With this option > you can get 2G HNAT wire-speed. > c) is great for me and other users which uses the external phy as wan port. > RGMII = wan port of the device. With this option you also can get 2G HNAT > wire-speed. Thanks. I am still confused, but that's not your fault :-) >> What I have been able to get working is 1). I have not experimented >> with 2). But I guess that is what you want, since the SFP is connected >> to the switch on the ER-X-SFP? > > Did you get any data on your network? Yes. The Quantenna module boots over this interface using tftp. I use dnsmasq to serve it the u-boot.bin and topaz-linux.lzma.img images (built using the Quantenna SDK - no OpenWrt here. Yet :-). So there has been a few bytes transferred already after a client boot from poweroff: root@OpenWrt:/# ifconfig eth1 eth1 Link encap:Ethernet HWaddr 60:31:97:66:16:11 inet addr:1.1.1.1 Bcast:1.1.1.255 Mask:255.255.255.0 inet6 addr: fe80::6231:97ff:fe66:1611/64 Scope:Link inet6 addr: fdfa:f6cd:60a:10::1/60 Scope:Global UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1 RX packets:5858 errors:0 dropped:1 overruns:0 frame:0 TX packets:5857 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:352536 (344.2 KiB) TX bytes:8814324 (8.4 MiB) Interrupt:15 I can also talk to the Quantenna module over this interface using tools from the SDK: root@OpenWrt:/# qcsapi_sockrpc --host 1.1.1.2 get_firmware_version 37.3.1.25 root@OpenWrt:/# qcsapi_sockrpc --host 1.1.1.2 get_sys_status C000001F bit 0 - Ethernet interface bit 1 - PCIE EP driver bit 2 - PCIE RC driver bit 3 - WiFi driver bit 4 - Rpcd server bit 30 - Calstate mode bit 31 - System boot up completely root@OpenWrt:/# qcsapi_sockrpc enable_telnet 1 complete And after the last command, I can log into it: root@OpenWrt:/# telnet 1.1.1.2 Entering character mode Escape character is '^]'. soc1 login: root BusyBox v1.10.3 (2015-04-21 17:30:57 CST) built-in shell (ash) Enter 'help' for a list of built-in commands. quantenna # quantenna # cat /proc/cpuinfo Processor Family: ARC 700 [0x33] CPU speed : 500.00 Mhz Timers: TIMER1 TIMER0 Interrupt Vect Base: 0x88026400 Peripheral Base: NOT present; assuming 0xCOFC0000 Data UNCACHED Base (I/O): start 0xc0 Sz, 1024 MB Bogo MIPS : 249.03 ARC700 MMU Ver [2] PAGE SIZE 8k JTLB 128 x 2 = 256 entries uDTLB 8 entr, uITLB 4 entr TLB Refill "will NOT" Flush uTLBs Detected I-cache : Type=2 way set-assoc, Line length=32, Size=16K (enabled) Detected D-cache : Type=4 way set-assoc, Line length=32, Size=16K (enabled) Extensions: MPY: 32x32 with ANY Result Reg MAC MPY: Dual 16 x 16 and 32 x 16 DCCM: N/A ICCM: N/A CRC: N/A, SWAP: Present NORM: Present Min-Max: Present, Barrel Shifter: Present Ext Arith Insn: Present Floating Point Extension: N/A AFAICS, this interface works pretty stable. And I've been trying to generate a bit of simultaneous traffic on both eth0 and eth1 without killing anything. Looks good to me. At least so far. I am still struggling with the weird Quantenna API, wondering if it is really worth the effort. It would be good to run OpenWrt on that module too of course, but I don't think that will happen any time soon... I started out with ILOVEPIEs excellent work here: https://github.com/ILOVEPIE/qts1kpcie_wifi_driver which, despite what the support table says, works just as fine with my RGMII module. The problem is that it works "mostly". Getting it anywhere near something I would like to use myself outside the lab is still lots of work. The API is (or was?) unstable, so there are lots of different firmware versions with matching tools around. And the firmware is usually built by the OEM for some specific application. Trying to make this into more generic "Quantenna QTS1000 support" might be impossible. I spent a couple of weeks trying to figure out why the wifi interface I created sucked, before I realized that it was a well known bug in many of the more recent Quantenna firmware versions, affecting Android clients. And I always used my phone as a test client of course... Changing client or changing firmware back to an older version fixed the issue. But then I got a completely different API. Really annoying. > On ER-X-SFP sfp port is connected like: SFP port -> SGMII -> external > phy (at8035) -> RGMII -> MT7621 RGMII2 > > In my case 2nd GMAC did work in linux but no real data comes in or out > the device. > Probably of some hardware setting that I have missed. > >> This is probably related to the magic register settings I had to disable >> to get my device working. I assume the real fix is to make the driver >> DTRT based on the DTS. > > I think option a is for now the best option to get supported in openwrt. > This works for both of us. John was busy to refactor my code to get it > upstream. > Because of lack of time it is still not done. > > Next step could be enabling the 2nd GMAC and try to implement the > option above. > >> Not sure I have the correct picture of the MT7621 though. Either I am >> stupid or this is explained confusingly in the docs I've seen... A >> little of both probably. > > Lack of the offical and compleet documents and time are for me the main > issue it is still not working. > >> Bjørn > > BTW. Do you have some more info about WAP6805? Not many hits on Google. I believe it's a custom version of the WAP6806. I've only seen it sold from a local ISP under the marketing name "Altibox WiFi+. You can see it here: https://www.komplett.no/product/904060/datautstyr/nettverk/range-extender/altibox-wifi-pluss I took a few pictures of the internals: https://www.mork.no/~bjorn/wap6805/ As you can see, it is a quite nice box: Easy to open without breaking anything, and the board had two serial headers (both with "standard" Mitrastar pinout - like the P8702N for example). One of the serial ports is connected to the console on the Quantenna module. The Quantenna module is an oversized "mini-PCIe" module. But as I said: It is connected by RGMII. And obviously serial, and maybe some GPIOs? So it cannot be simply replaced by a standard mini-PCIe module, unfortunately. If you look at the FCC photos linked from https://wikidevi.com/wiki/ZyXEL_WAP6806_(Armor_X1) you will notice that the Quantenna module is exactly the same. And the main boards are almost identical. The only differences appear to be due to the casing. The OEM firmware on the WAP6805 is of course slightly customized for Altibox. The most important change is the default root password, which is Wi9cXkg5Hse2K As you can see from the marketing stuff, it isn't really intended to be managed by the end user at all. It will attempt to tunnel TR69 to Altibox so they can configure it for you. There isn't any local web gui or anything. But it runs dropbear by default, so who cares? :-) Bjørn
Quoting Bjørn Mork <bjorn@mork.no>: <snip> > Yes. The Quantenna module boots over this interface using tftp. I use > dnsmasq to serve it the u-boot.bin and topaz-linux.lzma.img images > (built using the Quantenna SDK - no OpenWrt here. Yet :-). > Hmm I should try your work too! Check if 2nd GMAC is working on my board. I hope I have some time this weekend. <snip> >> BTW. Do you have some more info about WAP6805? Not many hits on Google. > > I believe it's a custom version of the WAP6806. I've only seen it sold > from a local ISP under the marketing name "Altibox WiFi+. > > You can see it here: > https://www.komplett.no/product/904060/datautstyr/nettverk/range-extender/altibox-wifi-pluss > > I took a few pictures of the internals: https://www.mork.no/~bjorn/wap6805/ > > As you can see, it is a quite nice box: Easy to open without breaking > anything, and the board had two serial headers (both with "standard" > Mitrastar pinout - like the P8702N for example). One of the serial > ports is connected to the console on the Quantenna module. > > The Quantenna module is an oversized "mini-PCIe" module. But as I said: > It is connected by RGMII. And obviously serial, and maybe some GPIOs? > So it cannot be simply replaced by a standard mini-PCIe module, > unfortunately. > > If you look at the FCC photos linked from > https://wikidevi.com/wiki/ZyXEL_WAP6806_(Armor_X1) > you will notice that the Quantenna module is exactly the same. And the > main boards are almost identical. The only differences appear to be due > to the casing. > > The OEM firmware on the WAP6805 is of course slightly customized for > Altibox. The most important change is the default root password, which > is Wi9cXkg5Hse2K > > As you can see from the marketing stuff, it isn't really intended to be > managed by the end user at all. It will attempt to tunnel TR69 to > Altibox so they can configure it for you. There isn't any local web gui > or anything. But it runs dropbear by default, so who cares? :-) > > > Bjørn Thanks, Greats, René
This is NOT READY for merge. ( This code can also be found in a github branch, in case you find that easier to review: https://github.com/bmork/LEDE/tree/mt7621-with-mainline-eth-driver ) Hoping for some early feedback in case what I am doing here is completely out of the question. Which it very well might be... The primary questions are: - Is it OK to rename the out-of-tree ramips ethernet directory to avoid conflict with the mainline mediatek ethernet drivers? - Is it OK to let the MT7621 use the mainline driver, while the rest of the ramips target still use the out-of-tree - If OK, is the method I use here fine, or is there some better way to create a split of this type? My final goal is supporting MT7621 devices where the second ethernet gmac is connected to something else than the internal switch. I have one such device, the ZyXEL WAP6805, with a Quantenna 5G module connected by RGMII to the MT7621. Patches for this device is included primarily as an example of how the per-device driver change is done. Using the mainline driver also means converting to DSA, similar to the mediatek target. So this also serves as an example of how that change can be done (The recent discussion about DSA configration was the trigger that made me submit this unfinished work now). Note that this is for new devices only. Support for migrating existing configs to DSA is not (yet) part of this work. The first two patches in the series can be safely ignored by anyone not specifically interested in the ZyXEL WAP6805. They only add basic support for this device. The 3rd patch renames the out-of-tree driver directory from "mediatek" to "ramips" to enable this driver to co-exist with the mainline driver. Patch 4 imports all OpenWRT patches from the mediatek target, on the assumption that the drivers for these two tagets should be kept in sync. Patch 5 has all the necessary magic to acually enable MT7621 support in the mainline driver. Please note how few these changes really are. Patch 6 works around an issue where the ethernet devices would lock up due to a sofirq busy loop. I'll admit that I don't full understand the issue, or why it should affect this driver and not the out-of-tree version. But I wonder of this is really the issue seen by a number of people reporting lockups and driver resets with MT7621? Patch 7 modifies the mt7621.dtsi to be compatible with the mainline driver, while keeping compatibility with the out-of-tree driver. Patch 8 adds the mainline driver configuration as a virtual package, enabling per-device switching from out-of-tree to mainline driver. Patch 9 shows how the changes necessary to switch the WAP6805 device to the mainline driver. This serves as documentation of the process. Most of the patch concerns adding DSA support to the DTS. Bjørn Mork (9): wap6805: add Mitrastar uImage tool wap6805: add board definition and DTS ramips: rename out-of-tree net driver to "ralink" mt7621: import mtk_eth_soc and mt7530 patches from the mediatek target mt7621: enable mainline driver mt7621: fix softirq loop mt7621: update dtsi mt7621 dsa: add virtual DSA kernel package wap6805: use mtk-eth-soc driver with DSA include/image-commands.mk | 10 + .../linux/ramips/base-files/etc/board.d/02_network | 3 + .../ramips/base-files/etc/board.d/03_gpio_switches | 3 + target/linux/ramips/base-files/lib/ramips.sh | 3 + .../ramips/base-files/lib/upgrade/platform.sh | 6 +- target/linux/ramips/dts/WAP6805.dts | 201 +++++ target/linux/ramips/dts/mt7621.dtsi | 5 +- .../drivers/net/ethernet/mediatek/Kconfig | 70 -- .../drivers/net/ethernet/mediatek/Makefile | 22 - .../files-4.14/drivers/net/ethernet/ralink/Kconfig | 70 ++ .../drivers/net/ethernet/ralink/Makefile | 22 + .../net/ethernet/{mediatek => ralink}/esw_rt3050.c | 0 .../net/ethernet/{mediatek => ralink}/esw_rt3050.h | 2 +- .../net/ethernet/{mediatek => ralink}/ethtool.c | 0 .../net/ethernet/{mediatek => ralink}/ethtool.h | 0 .../net/ethernet/{mediatek => ralink}/gsw_mt7620.c | 0 .../net/ethernet/{mediatek => ralink}/gsw_mt7620.h | 0 .../net/ethernet/{mediatek => ralink}/gsw_mt7621.c | 0 .../net/ethernet/{mediatek => ralink}/mdio.c | 2 +- .../net/ethernet/{mediatek => ralink}/mdio.h | 2 +- .../ethernet/{mediatek => ralink}/mdio_mt7620.c | 0 .../ethernet/{mediatek => ralink}/mdio_rt2880.c | 0 .../ethernet/{mediatek => ralink}/mdio_rt2880.h | 0 .../net/ethernet/{mediatek => ralink}/mt7530.c | 0 .../net/ethernet/{mediatek => ralink}/mt7530.h | 0 .../ethernet/{mediatek => ralink}/mtk_debugfs.c | 0 .../ethernet/{mediatek => ralink}/mtk_eth_soc.c | 12 +- .../ethernet/{mediatek => ralink}/mtk_eth_soc.h | 0 .../ethernet/{mediatek => ralink}/mtk_offload.c | 6 +- .../ethernet/{mediatek => ralink}/mtk_offload.h | 0 .../net/ethernet/{mediatek => ralink}/soc_mt7620.c | 0 .../net/ethernet/{mediatek => ralink}/soc_mt7621.c | 0 .../net/ethernet/{mediatek => ralink}/soc_rt2880.c | 0 .../net/ethernet/{mediatek => ralink}/soc_rt3050.c | 0 .../net/ethernet/{mediatek => ralink}/soc_rt3883.c | 0 target/linux/ramips/image/mt7621.mk | 25 +- target/linux/ramips/modules.mk | 26 + target/linux/ramips/mt7620/config-4.14 | 14 +- target/linux/ramips/mt7621/config-4.14 | 13 +- target/linux/ramips/mt76x8/config-4.14 | 10 +- .../0027-net-next-mediatek-fix-DQL-support.patch | 92 ++ ...iatek-add-support-for-GMAC2-wired-to-ext-.patch | 26 + .../ramips/patches-4.14/0033-dsa-multi-cpu.patch | 268 ++++++ ...5-net-mediatek-disable-RX-VLan-offloading.patch | 47 + ...diatek-honour-special-tag-bit-inside-RX-D.patch | 50 ++ ...diatek-enable-special-tag-indication-for-.patch | 41 + ...a-mediatek-tell-GDMA-when-we-are-turning-.patch | 43 + .../0046-net-mediatek-add-irq-delay.patch | 21 + .../0051-net-mediatek-increase-tx_timeout.patch | 21 + .../ramips/patches-4.14/0062-mdio-atomic.patch | 14 + .../ramips/patches-4.14/0063-atomic-sleep.patch | 46 + ...k-remove-superfluous-pin-setup-for-MT7622.patch | 102 +++ .../ramips/patches-4.14/2200-mt7621-eth-dsa.patch | 121 +++ .../2201-mt7621-eth-fix-napi-int.patch | 22 + .../patches-4.14/700-add-net-ethernet-ralink.patch | 20 + target/linux/ramips/rt288x/config-4.14 | 10 +- target/linux/ramips/rt305x/config-4.14 | 8 +- target/linux/ramips/rt3883/config-4.14 | 10 +- tools/firmware-utils/Makefile | 1 + tools/firmware-utils/src/mkmitrastar.c | 958 +++++++++++++++++++++ 60 files changed, 2307 insertions(+), 141 deletions(-) create mode 100644 target/linux/ramips/dts/WAP6805.dts delete mode 100644 target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/Kconfig delete mode 100644 target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/Makefile create mode 100644 target/linux/ramips/files-4.14/drivers/net/ethernet/ralink/Kconfig create mode 100644 target/linux/ramips/files-4.14/drivers/net/ethernet/ralink/Makefile rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/esw_rt3050.c (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/esw_rt3050.h (95%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/ethtool.c (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/ethtool.h (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/gsw_mt7620.c (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/gsw_mt7620.h (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/gsw_mt7621.c (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mdio.c (98%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mdio.h (96%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mdio_mt7620.c (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mdio_rt2880.c (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mdio_rt2880.h (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mt7530.c (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mt7530.h (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mtk_debugfs.c (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mtk_eth_soc.c (99%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mtk_eth_soc.h (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mtk_offload.c (99%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/mtk_offload.h (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/soc_mt7620.c (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/soc_mt7621.c (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/soc_rt2880.c (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/soc_rt3050.c (100%) rename target/linux/ramips/files-4.14/drivers/net/ethernet/{mediatek => ralink}/soc_rt3883.c (100%) create mode 100644 target/linux/ramips/patches-4.14/0027-net-next-mediatek-fix-DQL-support.patch create mode 100644 target/linux/ramips/patches-4.14/0032-net-dsa-mediatek-add-support-for-GMAC2-wired-to-ext-.patch create mode 100644 target/linux/ramips/patches-4.14/0033-dsa-multi-cpu.patch create mode 100644 target/linux/ramips/patches-4.14/0035-net-mediatek-disable-RX-VLan-offloading.patch create mode 100644 target/linux/ramips/patches-4.14/0042-net-next-mediatek-honour-special-tag-bit-inside-RX-D.patch create mode 100644 target/linux/ramips/patches-4.14/0043-net-next-mediatek-enable-special-tag-indication-for-.patch create mode 100644 target/linux/ramips/patches-4.14/0044-net-next-dsa-mediatek-tell-GDMA-when-we-are-turning-.patch create mode 100644 target/linux/ramips/patches-4.14/0046-net-mediatek-add-irq-delay.patch create mode 100644 target/linux/ramips/patches-4.14/0051-net-mediatek-increase-tx_timeout.patch create mode 100644 target/linux/ramips/patches-4.14/0062-mdio-atomic.patch create mode 100644 target/linux/ramips/patches-4.14/0063-atomic-sleep.patch create mode 100644 target/linux/ramips/patches-4.14/0175-net-mediatek-remove-superfluous-pin-setup-for-MT7622.patch create mode 100644 target/linux/ramips/patches-4.14/2200-mt7621-eth-dsa.patch create mode 100644 target/linux/ramips/patches-4.14/2201-mt7621-eth-fix-napi-int.patch create mode 100644 target/linux/ramips/patches-4.14/700-add-net-ethernet-ralink.patch create mode 100644 tools/firmware-utils/src/mkmitrastar.c