| Message ID | 3558e538b55a2249b0a179c04c27e9d3715bbbaa.1532954208.git-series.quentin.schulz@bootlin.com |
|---|---|
| State | Changes Requested, archived |
| Delegated to: | David Miller |
| Headers | show |
| Series | mscc: ocelot: add support for SerDes muxing configuration | expand |
On 30/07/2018 14:43:47+0200, Quentin Schulz wrote: > HSIO register address space should be handled outside of the MAC > controller as there are some registers for PLL5 configuring, > SerDes/switch port muxing and a thermal sensor IP, so let's remove it. > > Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > --- > Documentation/devicetree/bindings/mips/mscc.txt | 16 ++++++++++++- > Documentation/devicetree/bindings/net/mscc-ocelot.txt | 9 ++----- > 2 files changed, 19 insertions(+), 6 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mips/mscc.txt b/Documentation/devicetree/bindings/mips/mscc.txt > index ae15ec3..bc817e9 100644 > --- a/Documentation/devicetree/bindings/mips/mscc.txt > +++ b/Documentation/devicetree/bindings/mips/mscc.txt > @@ -41,3 +41,19 @@ Example: > compatible = "mscc,ocelot-cpu-syscon", "syscon"; > reg = <0x70000000 0x2c>; > }; > + > +o HSIO regs: > + > +The SoC has a few registers (HSIO) handling miscellaneous functionalities: > +configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and > +status, SerDes muxing and a thermal sensor. > + > +Required properties: > +- compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd" > +- reg : Should contain registers location and length > + > +Example: > + syscon@10d0000 { > + compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd"; > + reg = <0x10d0000 0x10000>; > + }; > diff --git a/Documentation/devicetree/bindings/net/mscc-ocelot.txt b/Documentation/devicetree/bindings/net/mscc-ocelot.txt > index 0a84711..9e5c17d 100644 > --- a/Documentation/devicetree/bindings/net/mscc-ocelot.txt > +++ b/Documentation/devicetree/bindings/net/mscc-ocelot.txt > @@ -12,7 +12,6 @@ Required properties: > - "sys" > - "rew" > - "qs" > - - "hsio" > - "qsys" > - "ana" > - "portX" with X from 0 to the number of last port index available on that > @@ -45,7 +44,6 @@ Example: > reg = <0x1010000 0x10000>, > <0x1030000 0x10000>, > <0x1080000 0x100>, > - <0x10d0000 0x10000>, > <0x11e0000 0x100>, > <0x11f0000 0x100>, > <0x1200000 0x100>, > @@ -59,10 +57,9 @@ Example: > <0x1280000 0x100>, > <0x1800000 0x80000>, > <0x1880000 0x10000>; > - reg-names = "sys", "rew", "qs", "hsio", "port0", > - "port1", "port2", "port3", "port4", "port5", > - "port6", "port7", "port8", "port9", "port10", > - "qsys", "ana"; > + reg-names = "sys", "rew", "qs", "port0", "port1", "port2", > + "port3", "port4", "port5", "port6", "port7", > + "port8", "port9", "port10", "qsys", "ana"; > interrupts = <21 22>; > interrupt-names = "xtr", "inj"; > > -- > git-series 0.9.1
On Mon, Jul 30, 2018 at 02:43:47PM +0200, Quentin Schulz wrote: > HSIO register address space should be handled outside of the MAC > controller as there are some registers for PLL5 configuring, > SerDes/switch port muxing and a thermal sensor IP, so let's remove it. > > Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> > --- > Documentation/devicetree/bindings/mips/mscc.txt | 16 ++++++++++++- > Documentation/devicetree/bindings/net/mscc-ocelot.txt | 9 ++----- > 2 files changed, 19 insertions(+), 6 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mips/mscc.txt b/Documentation/devicetree/bindings/mips/mscc.txt > index ae15ec3..bc817e9 100644 > --- a/Documentation/devicetree/bindings/mips/mscc.txt > +++ b/Documentation/devicetree/bindings/mips/mscc.txt > @@ -41,3 +41,19 @@ Example: > compatible = "mscc,ocelot-cpu-syscon", "syscon"; > reg = <0x70000000 0x2c>; > }; > + > +o HSIO regs: > + > +The SoC has a few registers (HSIO) handling miscellaneous functionalities: > +configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and > +status, SerDes muxing and a thermal sensor. > + > +Required properties: > +- compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd" > +- reg : Should contain registers location and length > + > +Example: > + syscon@10d0000 { > + compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd"; simple-mfd is not appropriate without child nodes, so drop it. > + reg = <0x10d0000 0x10000>; > + }; > diff --git a/Documentation/devicetree/bindings/net/mscc-ocelot.txt b/Documentation/devicetree/bindings/net/mscc-ocelot.txt > index 0a84711..9e5c17d 100644 > --- a/Documentation/devicetree/bindings/net/mscc-ocelot.txt > +++ b/Documentation/devicetree/bindings/net/mscc-ocelot.txt > @@ -12,7 +12,6 @@ Required properties: > - "sys" > - "rew" > - "qs" > - - "hsio" > - "qsys" > - "ana" > - "portX" with X from 0 to the number of last port index available on that > @@ -45,7 +44,6 @@ Example: > reg = <0x1010000 0x10000>, > <0x1030000 0x10000>, > <0x1080000 0x100>, > - <0x10d0000 0x10000>, > <0x11e0000 0x100>, > <0x11f0000 0x100>, > <0x1200000 0x100>, > @@ -59,10 +57,9 @@ Example: > <0x1280000 0x100>, > <0x1800000 0x80000>, > <0x1880000 0x10000>; > - reg-names = "sys", "rew", "qs", "hsio", "port0", > - "port1", "port2", "port3", "port4", "port5", > - "port6", "port7", "port8", "port9", "port10", > - "qsys", "ana"; > + reg-names = "sys", "rew", "qs", "port0", "port1", "port2", > + "port3", "port4", "port5", "port6", "port7", > + "port8", "port9", "port10", "qsys", "ana"; > interrupts = <21 22>; > interrupt-names = "xtr", "inj"; > > -- > git-series 0.9.1
Hi Rob, On Mon, Aug 13, 2018 at 04:31:03PM -0600, Rob Herring wrote: > On Mon, Jul 30, 2018 at 02:43:47PM +0200, Quentin Schulz wrote: > > HSIO register address space should be handled outside of the MAC > > controller as there are some registers for PLL5 configuring, > > SerDes/switch port muxing and a thermal sensor IP, so let's remove it. > > > > Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> > > --- > > Documentation/devicetree/bindings/mips/mscc.txt | 16 ++++++++++++- > > Documentation/devicetree/bindings/net/mscc-ocelot.txt | 9 ++----- > > 2 files changed, 19 insertions(+), 6 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/mips/mscc.txt b/Documentation/devicetree/bindings/mips/mscc.txt > > index ae15ec3..bc817e9 100644 > > --- a/Documentation/devicetree/bindings/mips/mscc.txt > > +++ b/Documentation/devicetree/bindings/mips/mscc.txt > > @@ -41,3 +41,19 @@ Example: > > compatible = "mscc,ocelot-cpu-syscon", "syscon"; > > reg = <0x70000000 0x2c>; > > }; > > + > > +o HSIO regs: > > + > > +The SoC has a few registers (HSIO) handling miscellaneous functionalities: > > +configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and > > +status, SerDes muxing and a thermal sensor. > > + > > +Required properties: > > +- compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd" > > +- reg : Should contain registers location and length > > + > > +Example: > > + syscon@10d0000 { > > + compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd"; > > simple-mfd is not appropriate without child nodes, so drop it. > Understood but it's an intermediate patch. Later (patch 8), the SerDes muxing "controller" is added as a child to this node. There most likely will be some others in the future (temperature sensor for example). Furthermore, there's already a simple-mfd without children in this file: https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/mips/mscc.txt#L19 How should we handle this case? Thanks, Quentin > > + reg = <0x10d0000 0x10000>; > > + }; > > diff --git a/Documentation/devicetree/bindings/net/mscc-ocelot.txt b/Documentation/devicetree/bindings/net/mscc-ocelot.txt > > index 0a84711..9e5c17d 100644 > > --- a/Documentation/devicetree/bindings/net/mscc-ocelot.txt > > +++ b/Documentation/devicetree/bindings/net/mscc-ocelot.txt > > @@ -12,7 +12,6 @@ Required properties: > > - "sys" > > - "rew" > > - "qs" > > - - "hsio" > > - "qsys" > > - "ana" > > - "portX" with X from 0 to the number of last port index available on that > > @@ -45,7 +44,6 @@ Example: > > reg = <0x1010000 0x10000>, > > <0x1030000 0x10000>, > > <0x1080000 0x100>, > > - <0x10d0000 0x10000>, > > <0x11e0000 0x100>, > > <0x11f0000 0x100>, > > <0x1200000 0x100>, > > @@ -59,10 +57,9 @@ Example: > > <0x1280000 0x100>, > > <0x1800000 0x80000>, > > <0x1880000 0x10000>; > > - reg-names = "sys", "rew", "qs", "hsio", "port0", > > - "port1", "port2", "port3", "port4", "port5", > > - "port6", "port7", "port8", "port9", "port10", > > - "qsys", "ana"; > > + reg-names = "sys", "rew", "qs", "port0", "port1", "port2", > > + "port3", "port4", "port5", "port6", "port7", > > + "port8", "port9", "port10", "qsys", "ana"; > > interrupts = <21 22>; > > interrupt-names = "xtr", "inj"; > > > > -- > > git-series 0.9.1
On 14/08/2018 08:49:53+0200, Quentin Schulz wrote: > Understood but it's an intermediate patch. Later (patch 8), the SerDes > muxing "controller" is added as a child to this node. There most likely > will be some others in the future (temperature sensor for example). > > Furthermore, there's already a simple-mfd without children in this file: > https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/mips/mscc.txt#L19 > > How should we handle this case? > There were child nodes in previous version of the binding. You can remove simple-mfd now. The useful registers that are not used by any drivers are gpr and chipid.
Hi Alexandre, On Tue, Aug 14, 2018 at 02:41:35PM +0200, Alexandre Belloni wrote: > On 14/08/2018 08:49:53+0200, Quentin Schulz wrote: > > Understood but it's an intermediate patch. Later (patch 8), the SerDes > > muxing "controller" is added as a child to this node. There most likely > > will be some others in the future (temperature sensor for example). > > > > Furthermore, there's already a simple-mfd without children in this file: > > https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/mips/mscc.txt#L19 > > > > How should we handle this case? > > > > There were child nodes in previous version of the binding. You can > remove simple-mfd now. The useful registers that are not used by any > drivers are gpr and chipid. > And what about the use case I'm facing? I've got child nodes defined in it but with a later patch (but they actually haven't made it to the DT binding documentation, so that's for the next version of the patch series). OK, for removing simple-mfd from CPU chip regs documentation. Thanks, Quentin
On 16/08/2018 16:25:14+0200, Quentin Schulz wrote: > Hi Alexandre, > > On Tue, Aug 14, 2018 at 02:41:35PM +0200, Alexandre Belloni wrote: > > On 14/08/2018 08:49:53+0200, Quentin Schulz wrote: > > > Understood but it's an intermediate patch. Later (patch 8), the SerDes > > > muxing "controller" is added as a child to this node. There most likely > > > will be some others in the future (temperature sensor for example). > > > > > > Furthermore, there's already a simple-mfd without children in this file: > > > https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/mips/mscc.txt#L19 > > > > > > How should we handle this case? > > > > > > > There were child nodes in previous version of the binding. You can > > remove simple-mfd now. The useful registers that are not used by any > > drivers are gpr and chipid. > > > > And what about the use case I'm facing? I've got child nodes defined in > it but with a later patch (but they actually haven't made it to the > DT binding documentation, so that's for the next version of the patch > series). > I guess you should keep simple-mfd for hsio because it will have child nodes.
diff --git a/Documentation/devicetree/bindings/mips/mscc.txt b/Documentation/devicetree/bindings/mips/mscc.txt index ae15ec3..bc817e9 100644 --- a/Documentation/devicetree/bindings/mips/mscc.txt +++ b/Documentation/devicetree/bindings/mips/mscc.txt @@ -41,3 +41,19 @@ Example: compatible = "mscc,ocelot-cpu-syscon", "syscon"; reg = <0x70000000 0x2c>; }; + +o HSIO regs: + +The SoC has a few registers (HSIO) handling miscellaneous functionalities: +configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and +status, SerDes muxing and a thermal sensor. + +Required properties: +- compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd" +- reg : Should contain registers location and length + +Example: + syscon@10d0000 { + compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd"; + reg = <0x10d0000 0x10000>; + }; diff --git a/Documentation/devicetree/bindings/net/mscc-ocelot.txt b/Documentation/devicetree/bindings/net/mscc-ocelot.txt index 0a84711..9e5c17d 100644 --- a/Documentation/devicetree/bindings/net/mscc-ocelot.txt +++ b/Documentation/devicetree/bindings/net/mscc-ocelot.txt @@ -12,7 +12,6 @@ Required properties: - "sys" - "rew" - "qs" - - "hsio" - "qsys" - "ana" - "portX" with X from 0 to the number of last port index available on that @@ -45,7 +44,6 @@ Example: reg = <0x1010000 0x10000>, <0x1030000 0x10000>, <0x1080000 0x100>, - <0x10d0000 0x10000>, <0x11e0000 0x100>, <0x11f0000 0x100>, <0x1200000 0x100>, @@ -59,10 +57,9 @@ Example: <0x1280000 0x100>, <0x1800000 0x80000>, <0x1880000 0x10000>; - reg-names = "sys", "rew", "qs", "hsio", "port0", - "port1", "port2", "port3", "port4", "port5", - "port6", "port7", "port8", "port9", "port10", - "qsys", "ana"; + reg-names = "sys", "rew", "qs", "port0", "port1", "port2", + "port3", "port4", "port5", "port6", "port7", + "port8", "port9", "port10", "qsys", "ana"; interrupts = <21 22>; interrupt-names = "xtr", "inj";
HSIO register address space should be handled outside of the MAC controller as there are some registers for PLL5 configuring, SerDes/switch port muxing and a thermal sensor IP, so let's remove it. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> --- Documentation/devicetree/bindings/mips/mscc.txt | 16 ++++++++++++- Documentation/devicetree/bindings/net/mscc-ocelot.txt | 9 ++----- 2 files changed, 19 insertions(+), 6 deletions(-)