| Message ID | D728AD1FA2543948B89DE29C5BF4CD0716AF9623@bjmail1.bj.datangmobile.com (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Delegated to: | Kumar Gala |
| Headers | show |
On Feb 17, 2009, at 11:47 PM, <dayu@datangmobile.cn> <dayu@datangmobile.cn > wrote: > > From: Da Yu <dayu@datangmobile.cn> > Date: Wed, 18 Feb 2009 19:58:20 +0800 > Subject: [PATCH] fix the interrupt loss problem on powerpc IPIC > (2.6.25-2.6.28) > > Description: The interrupt pending register is write 1 clear. If > there are more than one external interrupts pending at the same > time, acking the first interrupt by reading pending register then OR > the corresponding bit and write back to pending register will also > clear other interrupt pending bits. That will cause loss of > interrupt. > > Signed-off-by: Da Yu <dayu@datangmobile.cn> > --- applied to next - k
--- a/arch/powerpc/sysdev/ipic.c 2009-02-18 09:47:04.000000000 +0800 +++ b/arch/powerpc/sysdev/ipic.c 2009-02-18 09:46:34.000000000 +0800 @@ -568,8 +568,7 @@ static void ipic_ack_irq(unsigned int vi spin_lock_irqsave(&ipic_lock, flags); - temp = ipic_read(ipic->regs, ipic_info[src].ack); - temp |= (1 << (31 - ipic_info[src].bit)); + temp = 1 << (31 - ipic_info[src].bit); ipic_write(ipic->regs, ipic_info[src].ack, temp); /* mb() can't guarantee that ack is finished. But it does finish @@ -592,8 +591,7 @@ static void ipic_mask_irq_and_ack(unsign temp &= ~(1 << (31 - ipic_info[src].bit)); ipic_write(ipic->regs, ipic_info[src].mask, temp); - temp = ipic_read(ipic->regs, ipic_info[src].ack); - temp |= (1 << (31 - ipic_info[src].bit)); + temp = 1 << (31 - ipic_info[src].bit); ipic_write(ipic->regs, ipic_info[src].ack, temp); /* mb() can't guarantee that ack is finished. But it does finish