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powerpc/nohash: Fix build with llvm-as

Message ID 20230216112915.1681631-1-mpe@ellerman.id.au (mailing list archive)
State Accepted
Commit a7caf3f181f160ae13ece0124e1c268d22263708
Headers show
Series powerpc/nohash: Fix build with llvm-as | expand

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Commit Message

Michael Ellerman Feb. 16, 2023, 11:29 a.m. UTC
When using the LLVM integrated assembler (llvm-as), the book3e build
fails with:

  arch/powerpc/mm/nohash/tlb_low_64e.S:354:2: error: invalid instruction
   tlbilxva 0,%r15
   ^

tlbilxva is an extended mnemonic for tlbilx, but llvm-as also doesn't
support tlbilx, despite it being an e500mc instruction.

Fix it by using the existing PPC_TLBILX_VA macro. The resulting binary
is identical when building with binutils.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
 arch/powerpc/mm/nohash/tlb_low_64e.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Michael Ellerman Feb. 20, 2023, 3:49 a.m. UTC | #1
On Thu, 16 Feb 2023 22:29:15 +1100, Michael Ellerman wrote:
> When using the LLVM integrated assembler (llvm-as), the book3e build
> fails with:
> 
>   arch/powerpc/mm/nohash/tlb_low_64e.S:354:2: error: invalid instruction
>    tlbilxva 0,%r15
>    ^
> 
> [...]

Applied to powerpc/next.

[1/1] powerpc/nohash: Fix build with llvm-as
      https://git.kernel.org/powerpc/c/a7caf3f181f160ae13ece0124e1c268d22263708

cheers
diff mbox series

Patch

diff --git a/arch/powerpc/mm/nohash/tlb_low_64e.S b/arch/powerpc/mm/nohash/tlb_low_64e.S
index 76cf456d7976..7e0b8fe1c279 100644
--- a/arch/powerpc/mm/nohash/tlb_low_64e.S
+++ b/arch/powerpc/mm/nohash/tlb_low_64e.S
@@ -351,7 +351,7 @@  END_FTR_SECTION_NESTED(CPU_FTR_EMB_HV,CPU_FTR_EMB_HV,532)
 
 	mfspr	r15,SPRN_MAS2
 	isync
-	tlbilxva 0,r15
+	PPC_TLBILX_VA(0,R15)
 	isync
 
 	mtspr	SPRN_MAS6,r10