| Message ID | 20200610062343.492293-6-aneesh.kumar@linux.ibm.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Support new pmem flush and sync instructions for POWER | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (ec7b8eb9bc7a519047485c95f7292b48f5b73fe6) |
| snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 13 lines checked |
| snowpatch_ozlabs/needsstable | success | Patch has no Fixes tags |
diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h index 81808d1b54ca..bb56a49c9a66 100644 --- a/arch/powerpc/include/asm/cacheflush.h +++ b/arch/powerpc/include/asm/cacheflush.h @@ -120,6 +120,13 @@ static inline void invalidate_dcache_range(unsigned long start, #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ memcpy(dst, src, len) + +#define arch_pmem_flush_barrier arch_pmem_flush_barrier +static inline void arch_pmem_flush_barrier(void) +{ + if (cpu_has_feature(CPU_FTR_ARCH_207S)) + asm volatile(PPC_PHWSYNC ::: "memory"); +} #endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_CACHEFLUSH_H */
of_pmem on POWER10 can now use phwsync instead of hwsync to ensure all previous writes are architecturally visible for the platform buffer flush. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> --- arch/powerpc/include/asm/cacheflush.h | 7 +++++++ 1 file changed, 7 insertions(+)