| Message ID | 20200320051809.24332-7-jniethe5@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Initial Prefixed Instruction support | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (8a445cbcb9f5090cb07ec6cbb89a8a1fc99a0ff7) |
| snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 26 lines checked |
| snowpatch_ozlabs/needsstable | success | Patch has no Fixes tags |
On Fri, 2020-03-20 at 16:17 +1100, Jordan Niethe wrote: > In preparation for using a data type for instructions that can not be > directly used with the '>>' operator use a function for getting the op > code of an instruction. we need to adopt this in sstep.c and vecemu.c -- Bala > > Signed-off-by: Jordan Niethe <jniethe5@gmail.com> > --- > v4: New to series > --- > arch/powerpc/kernel/align.c | 4 ++-- > arch/powerpc/lib/code-patching.c | 4 ++-- > 2 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c > index 38542fffa179..77c49dfdc1b4 100644 > --- a/arch/powerpc/kernel/align.c > +++ b/arch/powerpc/kernel/align.c > @@ -313,8 +313,8 @@ int fix_alignment(struct pt_regs *regs) > } > > #ifdef CONFIG_SPE > - if ((instr >> 26) == 0x4) { > - int reg = (instr >> 21) & 0x1f; > + if (ppc_inst_opcode(instr) == 0x4) { > + int reg = (ppc_inst_word(instr) >> 21) & 0x1f; > PPC_WARN_ALIGNMENT(spe, regs); > return emulate_spe(regs, reg, instr); > } > diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code- > patching.c > index e2ba23fd6f4d..04a303c059e2 100644 > --- a/arch/powerpc/lib/code-patching.c > +++ b/arch/powerpc/lib/code-patching.c > @@ -228,7 +228,7 @@ bool is_offset_in_branch_range(long offset) > */ > bool is_conditional_branch(ppc_inst instr) > { > - unsigned int opcode = instr >> 26; > + unsigned int opcode = ppc_inst_opcode(instr); > > if (opcode == 16) /* bc, bca, bcl, bcla */ > return true; > @@ -286,7 +286,7 @@ unsigned int create_cond_branch(const unsigned int *addr, > > static unsigned int branch_opcode(ppc_inst instr) > { > - return (instr >> 26) & 0x3F; > + return ppc_inst_opcode(instr) & 0x3F; > } > > static int instr_is_branch_iform(ppc_inst instr)
On Mon, Mar 23, 2020 at 5:54 PM Balamuruhan S <bala24@linux.ibm.com> wrote: > > On Fri, 2020-03-20 at 16:17 +1100, Jordan Niethe wrote: > > In preparation for using a data type for instructions that can not be > > directly used with the '>>' operator use a function for getting the op > > code of an instruction. > > we need to adopt this in sstep.c and vecemu.c Thank you, I had forgotten about vecemu.c. > > -- Bala > > > > Signed-off-by: Jordan Niethe <jniethe5@gmail.com> > > --- > > v4: New to series > > --- > > arch/powerpc/kernel/align.c | 4 ++-- > > arch/powerpc/lib/code-patching.c | 4 ++-- > > 2 files changed, 4 insertions(+), 4 deletions(-) > > > > diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c > > index 38542fffa179..77c49dfdc1b4 100644 > > --- a/arch/powerpc/kernel/align.c > > +++ b/arch/powerpc/kernel/align.c > > @@ -313,8 +313,8 @@ int fix_alignment(struct pt_regs *regs) > > } > > > > #ifdef CONFIG_SPE > > - if ((instr >> 26) == 0x4) { > > - int reg = (instr >> 21) & 0x1f; > > + if (ppc_inst_opcode(instr) == 0x4) { > > + int reg = (ppc_inst_word(instr) >> 21) & 0x1f; > > PPC_WARN_ALIGNMENT(spe, regs); > > return emulate_spe(regs, reg, instr); > > } > > diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code- > > patching.c > > index e2ba23fd6f4d..04a303c059e2 100644 > > --- a/arch/powerpc/lib/code-patching.c > > +++ b/arch/powerpc/lib/code-patching.c > > @@ -228,7 +228,7 @@ bool is_offset_in_branch_range(long offset) > > */ > > bool is_conditional_branch(ppc_inst instr) > > { > > - unsigned int opcode = instr >> 26; > > + unsigned int opcode = ppc_inst_opcode(instr); > > > > if (opcode == 16) /* bc, bca, bcl, bcla */ > > return true; > > @@ -286,7 +286,7 @@ unsigned int create_cond_branch(const unsigned int *addr, > > > > static unsigned int branch_opcode(ppc_inst instr) > > { > > - return (instr >> 26) & 0x3F; > > + return ppc_inst_opcode(instr) & 0x3F; > > } > > > > static int instr_is_branch_iform(ppc_inst instr) >
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c index 38542fffa179..77c49dfdc1b4 100644 --- a/arch/powerpc/kernel/align.c +++ b/arch/powerpc/kernel/align.c @@ -313,8 +313,8 @@ int fix_alignment(struct pt_regs *regs) } #ifdef CONFIG_SPE - if ((instr >> 26) == 0x4) { - int reg = (instr >> 21) & 0x1f; + if (ppc_inst_opcode(instr) == 0x4) { + int reg = (ppc_inst_word(instr) >> 21) & 0x1f; PPC_WARN_ALIGNMENT(spe, regs); return emulate_spe(regs, reg, instr); } diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c index e2ba23fd6f4d..04a303c059e2 100644 --- a/arch/powerpc/lib/code-patching.c +++ b/arch/powerpc/lib/code-patching.c @@ -228,7 +228,7 @@ bool is_offset_in_branch_range(long offset) */ bool is_conditional_branch(ppc_inst instr) { - unsigned int opcode = instr >> 26; + unsigned int opcode = ppc_inst_opcode(instr); if (opcode == 16) /* bc, bca, bcl, bcla */ return true; @@ -286,7 +286,7 @@ unsigned int create_cond_branch(const unsigned int *addr, static unsigned int branch_opcode(ppc_inst instr) { - return (instr >> 26) & 0x3F; + return ppc_inst_opcode(instr) & 0x3F; } static int instr_is_branch_iform(ppc_inst instr)
In preparation for using a data type for instructions that can not be directly used with the '>>' operator use a function for getting the op code of an instruction. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> --- v4: New to series --- arch/powerpc/kernel/align.c | 4 ++-- arch/powerpc/lib/code-patching.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-)