diff mbox series

[2/2] powerpc/perf: Check pmus_inuse flag in perf_event_print_debug()

Message ID 20191107130159.14146-2-maddy@linux.vnet.ibm.com (mailing list archive)
State Superseded
Headers show
Series [1/2] powerpc/perf: Add mtmmcr0(FC) after ppc_set_pmu_inuse(1) | expand

Checks

Context Check Description
snowpatch_ozlabs/apply_patch success Successfully applied on branch powerpc/merge (85c5b0984ebb104ec7a0a853ec1e63c19f500313)
snowpatch_ozlabs/build-ppc64le success Build succeeded
snowpatch_ozlabs/build-ppc64be success Build succeeded
snowpatch_ozlabs/build-ppc64e fail build failed!
snowpatch_ozlabs/build-pmac32 fail build failed!
snowpatch_ozlabs/checkpatch fail total: 1 errors, 0 warnings, 0 checks, 41 lines checked

Commit Message

maddy Nov. 7, 2019, 1:01 p.m. UTC 
pmu_inuse flag is part of lppaca struct which notifies the hypervisor
whether guest/partition is using PMUs. This provides a hint for
save/restore of PMU registers. Currently perf_event_print_debug()
does not check for pmu_inuse flag and it is not safe to use it to
dump PMU SPRs in a CONFIG_PSERIES.

Patch adds two things here. 1) An inline ppc_get_pmu_inuse() to get
the pmu_inuse value and 2)check in perf_event_print_debug() before
dumping the PMU SPRs.

ppc_get_pmu_inuse() is based on ppc_set_pmu_inuse() and includes same
CONFIG_ checks.
---
 arch/powerpc/include/asm/pmc.h  | 15 +++++++++++++++
 arch/powerpc/perf/core-book3s.c |  9 +++++++++
 2 files changed, 24 insertions(+)
diff mbox series

Patch

diff --git a/arch/powerpc/include/asm/pmc.h b/arch/powerpc/include/asm/pmc.h
index c6bbe9778d3c..35179d218e2e 100644
--- a/arch/powerpc/include/asm/pmc.h
+++ b/arch/powerpc/include/asm/pmc.h
@@ -34,11 +34,26 @@  static inline void ppc_set_pmu_inuse(int inuse)
 #endif
 }
 
+static inline u8 ppc_get_pmu_inuse(void)
+{
+#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE)
+	if (firmware_has_feature(FW_FEATURE_LPAR)) {
+#ifdef CONFIG_PPC_PSERIES
+		return get_lppaca()->pmcregs_in_use;
+#endif
+	}
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
+	return get_paca()->pmcregs_in_use;
+#endif
+#endif
+}
+
 extern void power4_enable_pmcs(void);
 
 #else /* CONFIG_PPC64 */
 
 static inline void ppc_set_pmu_inuse(int inuse) { }
+static inline u8 ppc_get_pmu_inuse(void) { }
 
 #endif
 
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index f455e274281a..855a5f9589ef 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -816,6 +816,15 @@  void perf_event_print_debug(void)
 	if (!ppmu->n_counter)
 		return;
 
+	/*
+	 * Check pmu_inuse flag. As per PAPR spec, hypersivor
+	 * will save/restore the PMU regs only if pmu_inuse is
+	 * set. If its not enable, values dumped from these SPRs
+	 * may not be valid or useful.
+	 */
+	if (!ppc_get_pmu_inuse())
+		return;
+
 	local_irq_save(flags);
 
 	pr_info("CPU: %d PMU registers, ppmu = %s n_counters = %d",