| Message ID | 20181214091122.20992-2-anju@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | powerpc/perf: IMC trace-mode support | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | next/apply_patch Successfully applied |
| snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 76 lines checked |
On 14/12/18 2:41 PM, Anju T Sudhakar wrote: > Add the macros needed for IMC (In-Memory Collection Counters) trace-mode > and data structure to hold the trace-imc record data. > Also, add the new type "OPAL_IMC_COUNTERS_TRACE" in 'opal-api.h', since > there is a new switch case added in the opal-calls for IMC. Reviewed-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> > Signed-off-by: Anju T Sudhakar <anju@linux.vnet.ibm.com> > --- > arch/powerpc/include/asm/imc-pmu.h | 39 +++++++++++++++++++++++++++++ > arch/powerpc/include/asm/opal-api.h | 1 + > 2 files changed, 40 insertions(+) > > diff --git a/arch/powerpc/include/asm/imc-pmu.h b/arch/powerpc/include/asm/imc-pmu.h > index 69f516ecb2fd..7c2ef0e42661 100644 > --- a/arch/powerpc/include/asm/imc-pmu.h > +++ b/arch/powerpc/include/asm/imc-pmu.h > @@ -33,6 +33,7 @@ > */ > #define THREAD_IMC_LDBAR_MASK 0x0003ffffffffe000ULL > #define THREAD_IMC_ENABLE 0x8000000000000000ULL > +#define TRACE_IMC_ENABLE 0x4000000000000000ULL > > /* > * For debugfs interface for imc-mode and imc-command > @@ -59,6 +60,34 @@ struct imc_events { > char *scale; > }; > > +/* > + * Trace IMC hardware updates a 64bytes record on > + * Core Performance Monitoring Counter (CPMC) > + * overflow. Here is the layout for the trace imc record > + * > + * DW 0 : Timebase > + * DW 1 : Program Counter > + * DW 2 : PIDR information > + * DW 3 : CPMC1 > + * DW 4 : CPMC2 > + * DW 5 : CPMC3 > + * Dw 6 : CPMC4 > + * DW 7 : Timebase > + * ..... > + * > + * The following is the data structure to hold trace imc data. > + */ > +struct trace_imc_data { > + u64 tb1; > + u64 ip; > + u64 val; > + u64 cpmc1; > + u64 cpmc2; > + u64 cpmc3; > + u64 cpmc4; > + u64 tb2; > +}; > + > /* Event attribute array index */ > #define IMC_FORMAT_ATTR 0 > #define IMC_EVENT_ATTR 1 > @@ -68,6 +97,13 @@ struct imc_events { > /* PMU Format attribute macros */ > #define IMC_EVENT_OFFSET_MASK 0xffffffffULL > > +/* > + * Macro to mask bits 0:21 of first double word(which is the timebase) to > + * compare with 8th double word (timebase) of trace imc record data. > + */ > +#define IMC_TRACE_RECORD_TB1_MASK 0x3ffffffffffULL > + > + > /* > * Device tree parser code detects IMC pmu support and > * registers new IMC pmus. This structure will hold the > @@ -113,6 +149,7 @@ struct imc_pmu_ref { > > enum { > IMC_TYPE_THREAD = 0x1, > + IMC_TYPE_TRACE = 0x2, > IMC_TYPE_CORE = 0x4, > IMC_TYPE_CHIP = 0x10, > }; > @@ -123,6 +160,8 @@ enum { > #define IMC_DOMAIN_NEST 1 > #define IMC_DOMAIN_CORE 2 > #define IMC_DOMAIN_THREAD 3 > +/* For trace-imc the domain is still thread but it operates in trace-mode */ > +#define IMC_DOMAIN_TRACE 4 > > extern int init_imc_pmu(struct device_node *parent, > struct imc_pmu *pmu_ptr, int pmu_id); > diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h > index 870fb7b239ea..a4130b21b159 100644 > --- a/arch/powerpc/include/asm/opal-api.h > +++ b/arch/powerpc/include/asm/opal-api.h > @@ -1118,6 +1118,7 @@ enum { > enum { > OPAL_IMC_COUNTERS_NEST = 1, > OPAL_IMC_COUNTERS_CORE = 2, > + OPAL_IMC_COUNTERS_TRACE = 3, > }; > >
diff --git a/arch/powerpc/include/asm/imc-pmu.h b/arch/powerpc/include/asm/imc-pmu.h index 69f516ecb2fd..7c2ef0e42661 100644 --- a/arch/powerpc/include/asm/imc-pmu.h +++ b/arch/powerpc/include/asm/imc-pmu.h @@ -33,6 +33,7 @@ */ #define THREAD_IMC_LDBAR_MASK 0x0003ffffffffe000ULL #define THREAD_IMC_ENABLE 0x8000000000000000ULL +#define TRACE_IMC_ENABLE 0x4000000000000000ULL /* * For debugfs interface for imc-mode and imc-command @@ -59,6 +60,34 @@ struct imc_events { char *scale; }; +/* + * Trace IMC hardware updates a 64bytes record on + * Core Performance Monitoring Counter (CPMC) + * overflow. Here is the layout for the trace imc record + * + * DW 0 : Timebase + * DW 1 : Program Counter + * DW 2 : PIDR information + * DW 3 : CPMC1 + * DW 4 : CPMC2 + * DW 5 : CPMC3 + * Dw 6 : CPMC4 + * DW 7 : Timebase + * ..... + * + * The following is the data structure to hold trace imc data. + */ +struct trace_imc_data { + u64 tb1; + u64 ip; + u64 val; + u64 cpmc1; + u64 cpmc2; + u64 cpmc3; + u64 cpmc4; + u64 tb2; +}; + /* Event attribute array index */ #define IMC_FORMAT_ATTR 0 #define IMC_EVENT_ATTR 1 @@ -68,6 +97,13 @@ struct imc_events { /* PMU Format attribute macros */ #define IMC_EVENT_OFFSET_MASK 0xffffffffULL +/* + * Macro to mask bits 0:21 of first double word(which is the timebase) to + * compare with 8th double word (timebase) of trace imc record data. + */ +#define IMC_TRACE_RECORD_TB1_MASK 0x3ffffffffffULL + + /* * Device tree parser code detects IMC pmu support and * registers new IMC pmus. This structure will hold the @@ -113,6 +149,7 @@ struct imc_pmu_ref { enum { IMC_TYPE_THREAD = 0x1, + IMC_TYPE_TRACE = 0x2, IMC_TYPE_CORE = 0x4, IMC_TYPE_CHIP = 0x10, }; @@ -123,6 +160,8 @@ enum { #define IMC_DOMAIN_NEST 1 #define IMC_DOMAIN_CORE 2 #define IMC_DOMAIN_THREAD 3 +/* For trace-imc the domain is still thread but it operates in trace-mode */ +#define IMC_DOMAIN_TRACE 4 extern int init_imc_pmu(struct device_node *parent, struct imc_pmu *pmu_ptr, int pmu_id); diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h index 870fb7b239ea..a4130b21b159 100644 --- a/arch/powerpc/include/asm/opal-api.h +++ b/arch/powerpc/include/asm/opal-api.h @@ -1118,6 +1118,7 @@ enum { enum { OPAL_IMC_COUNTERS_NEST = 1, OPAL_IMC_COUNTERS_CORE = 2, + OPAL_IMC_COUNTERS_TRACE = 3, };
Add the macros needed for IMC (In-Memory Collection Counters) trace-mode and data structure to hold the trace-imc record data. Also, add the new type "OPAL_IMC_COUNTERS_TRACE" in 'opal-api.h', since there is a new switch case added in the opal-calls for IMC. Signed-off-by: Anju T Sudhakar <anju@linux.vnet.ibm.com> --- arch/powerpc/include/asm/imc-pmu.h | 39 +++++++++++++++++++++++++++++ arch/powerpc/include/asm/opal-api.h | 1 + 2 files changed, 40 insertions(+)