diff mbox series

[1/6] net/wan/fsl_ucc_hdlc: allow ucc index up to 4

Message ID 20180828110921.2542-2-david.gounaris@infinera.com (mailing list archive)
State Not Applicable
Headers show
Series Ethernet over hdlc | expand

Checks

Context Check Description
snowpatch_ozlabs/apply_patch success next/apply_patch Successfully applied
snowpatch_ozlabs/checkpatch warning Test checkpatch on branch next

Commit Message

David Gounaris Aug. 28, 2018, 11:09 a.m. UTC
There is a need to allow higher indexes to be
able to support MPC83xx platforms. (UCC1-UCC5)

Signed-off-by: David Gounaris <david.gounaris@infinera.com>
---
 drivers/net/wan/fsl_ucc_hdlc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Christophe Leroy Aug. 28, 2018, 1:34 p.m. UTC | #1
Le 28/08/2018 à 13:09, David Gounaris a écrit :
> There is a need to allow higher indexes to be
> able to support MPC83xx platforms. (UCC1-UCC5)

As far as I can see, MPC8358 has 8 UCCs (ref 
https://www.nxp.com/products/processors-and-microcontrollers/power-architecture-processors/powerquicc-processors/powerquicc-ii-pro/powerquicc-ii-pro-processor-with-ddr2-tdm-pci-security-usb-quicc-engine-with-1-gb-ethernet-utopia:MPC8358E)

Christophe

> 
> Signed-off-by: David Gounaris <david.gounaris@infinera.com>
> ---
>   drivers/net/wan/fsl_ucc_hdlc.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c
> index 5f0366a125e2..3c0e0a1d19ba 100644
> --- a/drivers/net/wan/fsl_ucc_hdlc.c
> +++ b/drivers/net/wan/fsl_ucc_hdlc.c
> @@ -1015,7 +1015,7 @@ static int ucc_hdlc_probe(struct platform_device *pdev)
>   	}
>   
>   	ucc_num = val - 1;
> -	if ((ucc_num > 3) || (ucc_num < 0)) {
> +	if ((ucc_num > 4) || (ucc_num < 0)) {
>   		dev_err(&pdev->dev, ": Invalid UCC num\n");
>   		return -EINVAL;
>   	}
>
Christophe Leroy Aug. 29, 2018, 7:09 a.m. UTC | #2
Le 28/08/2018 à 15:34, Christophe LEROY a écrit :
> 
> 
> Le 28/08/2018 à 13:09, David Gounaris a écrit :
>> There is a need to allow higher indexes to be
>> able to support MPC83xx platforms. (UCC1-UCC5)
> 
> As far as I can see, MPC8358 has 8 UCCs (ref 
> https://www.nxp.com/products/processors-and-microcontrollers/power-architecture-processors/powerquicc-processors/powerquicc-ii-pro/powerquicc-ii-pro-processor-with-ddr2-tdm-pci-security-usb-quicc-engine-with-1-gb-ethernet-utopia:MPC8358E) 

Indeed, the code should use UCC_MAX_NUM which is defined in 
include/soc/fsl/qe/ucc.h

Christophe

> 
> 
> Christophe
> 
>>
>> Signed-off-by: David Gounaris <david.gounaris@infinera.com>
>> ---
>>   drivers/net/wan/fsl_ucc_hdlc.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/net/wan/fsl_ucc_hdlc.c 
>> b/drivers/net/wan/fsl_ucc_hdlc.c
>> index 5f0366a125e2..3c0e0a1d19ba 100644
>> --- a/drivers/net/wan/fsl_ucc_hdlc.c
>> +++ b/drivers/net/wan/fsl_ucc_hdlc.c
>> @@ -1015,7 +1015,7 @@ static int ucc_hdlc_probe(struct platform_device 
>> *pdev)
>>       }
>>       ucc_num = val - 1;
>> -    if ((ucc_num > 3) || (ucc_num < 0)) {
>> +    if ((ucc_num > 4) || (ucc_num < 0)) {
>>           dev_err(&pdev->dev, ": Invalid UCC num\n");
>>           return -EINVAL;
>>       }
>>
David Gounaris Aug. 29, 2018, 1:13 p.m. UTC | #3
Here is what has been changed in v2 after the review comments.

v2-0001: Using UCC_MAX_NUM
v2-0002: Unchanged
v2-0003: Changed commit message
v2-0004: Adding fsl,hmask into the dt instead of changing the default value.
v2-0005: Unchanged
v2-0006: Unchanged

Adding robh+dt@kernel.org for comments regarding dt.

Best Regards
David Gounaris

David Gounaris (6):
  net/wan/fsl_ucc_hdlc: allow ucc index up to 7
  net/wan/fsl_ucc_hdlc: allow PARITY_CRC16_PR0_CCITT parity
  net/wan/fsl_ucc_hdlc: Adding ARPHRD_ETHER
  net/wan/fsl_ucc_hdlc: hmask
  net/wan/fsl_ucc_hdlc: GUMR for non tsa mode
  net/wan/fsl_ucc_hdlc: tx timeout handler

 .../devicetree/bindings/soc/fsl/cpm_qe/network.txt |  6 +++++
 drivers/net/wan/fsl_ucc_hdlc.c                     | 28 +++++++++++++++++++---
 drivers/net/wan/fsl_ucc_hdlc.h                     |  1 +
 3 files changed, 32 insertions(+), 3 deletions(-)
Christophe Leroy Sept. 1, 2018, 8:10 a.m. UTC | #4
Le 29/08/2018 à 15:13, David Gounaris a écrit :
> Here is what has been changed in v2 after the review comments.
> 
> v2-0001: Using UCC_MAX_NUM

This one has a warning/check from checkpatch

> v2-0002: Unchanged
> v2-0003: Changed commit message
> v2-0004: Adding fsl,hmask into the dt instead of changing the default value.
> v2-0005: Unchanged
> v2-0006: Unchanged

All the above have an error from checkpatch

You should run checkpatch on your patches and fix the errors and warnings.

You can also see them at 
https://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=63075

Christophe

> 
> Adding robh+dt@kernel.org for comments regarding dt.
> 
> Best Regards
> David Gounaris
> 
> David Gounaris (6):
>    net/wan/fsl_ucc_hdlc: allow ucc index up to 7
>    net/wan/fsl_ucc_hdlc: allow PARITY_CRC16_PR0_CCITT parity
>    net/wan/fsl_ucc_hdlc: Adding ARPHRD_ETHER
>    net/wan/fsl_ucc_hdlc: hmask
>    net/wan/fsl_ucc_hdlc: GUMR for non tsa mode
>    net/wan/fsl_ucc_hdlc: tx timeout handler
> 
>   .../devicetree/bindings/soc/fsl/cpm_qe/network.txt |  6 +++++
>   drivers/net/wan/fsl_ucc_hdlc.c                     | 28 +++++++++++++++++++---
>   drivers/net/wan/fsl_ucc_hdlc.h                     |  1 +
>   3 files changed, 32 insertions(+), 3 deletions(-)
> 

---
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David Gounaris Sept. 3, 2018, 12:47 p.m. UTC | #5
Here is what has been changed in v3 after the review comments from v2.

v3-0001: corrected style problems
v3-0002: corrected style problems
v3-0003: corrected style problems
v3-0004: corrected style problems
v3-0005: corrected style problems
v3-0006: corrected style problems

Sorry for that, I did not know about scripts/checkpatch.pl.

David Gounaris (6):
  net/wan/fsl_ucc_hdlc: allow ucc index up to 7
  net/wan/fsl_ucc_hdlc: allow PARITY_CRC16_PR0_CCITT parity
  net/wan/fsl_ucc_hdlc: Adding ARPHRD_ETHER
  net/wan/fsl_ucc_hdlc: hmask
  net/wan/fsl_ucc_hdlc: GUMR for non tsa mode
  net/wan/fsl_ucc_hdlc: tx timeout handler

 .../devicetree/bindings/soc/fsl/cpm_qe/network.txt |  6 +++++
 drivers/net/wan/fsl_ucc_hdlc.c                     | 26 ++++++++++++++++++++--
 drivers/net/wan/fsl_ucc_hdlc.h                     |  1 +
 3 files changed, 31 insertions(+), 2 deletions(-)
David Miller Sept. 4, 2018, 5:14 a.m. UTC | #6
From: David Gounaris <david.gounaris@infinera.com>
Date: Mon,  3 Sep 2018 14:47:24 +0200

> Here is what has been changed in v3 after the review comments from v2.
> 
> v3-0001: corrected style problems
> v3-0002: corrected style problems
> v3-0003: corrected style problems
> v3-0004: corrected style problems
> v3-0005: corrected style problems
> v3-0006: corrected style problems
> 
> Sorry for that, I did not know about scripts/checkpatch.pl.

Series applied to net-next.
diff mbox series

Patch

diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c
index 5f0366a125e2..3c0e0a1d19ba 100644
--- a/drivers/net/wan/fsl_ucc_hdlc.c
+++ b/drivers/net/wan/fsl_ucc_hdlc.c
@@ -1015,7 +1015,7 @@  static int ucc_hdlc_probe(struct platform_device *pdev)
 	}
 
 	ucc_num = val - 1;
-	if ((ucc_num > 3) || (ucc_num < 0)) {
+	if ((ucc_num > 4) || (ucc_num < 0)) {
 		dev_err(&pdev->dev, ": Invalid UCC num\n");
 		return -EINVAL;
 	}