| Message ID | 20180511080313.29815-1-ruscur@russell.cc (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 8a792262f320245de0174e6bcb551312f2e2debe |
| Headers | show |
| Series | powerpc/xive: Remove (almost) unused macros | expand |
Russell Currey <ruscur@russell.cc> writes: > diff --git a/arch/powerpc/sysdev/xive/native.c b/arch/powerpc/sysdev/xive/native.c > index b48454be5b98..3b471c0193ca 100644 > --- a/arch/powerpc/sysdev/xive/native.c > +++ b/arch/powerpc/sysdev/xive/native.c > @@ -341,7 +341,7 @@ static void xive_native_update_pending(struct xive_cpu *xc) > * of the hypervisor interrupt (if any) > */ > cppr = ack & 0xff; > - he = GETFIELD(TM_QW3_NSR_HE, (ack >> 8)); > + he = ((ack >> 8) & TM_QW3_NSR_HE) >> (ffs(TM_QW3_NSR_HE) - 1); Using the #defines and ffs() here doesn't make the code any more readable or maintainable. We can just write: he = ack >> 14; Or if we want to be more explicit about it being the top two bits of the 2nd byte: he = (ack >> 8) >> 6; cheers
On Fri, 2018-05-11 at 08:03:13 UTC, Russell Currey wrote: > The GETFIELD and SETFIELD macros in xive-regs.h aren't used except for a > single instance of GETFIELD, so replace that and remove them. > > These macros are also defined in vas.h, so either those should be > eventually replaced or the macros moved into bitops.h. > > Signed-off-by: Russell Currey <ruscur@russell.cc> Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/8a792262f320245de0174e6bcb5513 cheers
diff --git a/arch/powerpc/include/asm/xive-regs.h b/arch/powerpc/include/asm/xive-regs.h index fa4288822b68..6de989f8defd 100644 --- a/arch/powerpc/include/asm/xive-regs.h +++ b/arch/powerpc/include/asm/xive-regs.h @@ -123,10 +123,4 @@ #define TM_QW3_NSR_I PPC_BIT8(2) #define TM_QW3_NSR_GRP_LVL PPC_BIT8(3,7) -/* Utilities to manipulate these (originaly from OPAL) */ -#define MASK_TO_LSH(m) (__builtin_ffsl(m) - 1) -#define GETFIELD(m, v) (((v) & (m)) >> MASK_TO_LSH(m)) -#define SETFIELD(m, v, val) \ - (((v) & ~(m)) | ((((typeof(v))(val)) << MASK_TO_LSH(m)) & (m))) - #endif /* _ASM_POWERPC_XIVE_REGS_H */ diff --git a/arch/powerpc/sysdev/xive/native.c b/arch/powerpc/sysdev/xive/native.c index b48454be5b98..3b471c0193ca 100644 --- a/arch/powerpc/sysdev/xive/native.c +++ b/arch/powerpc/sysdev/xive/native.c @@ -341,7 +341,7 @@ static void xive_native_update_pending(struct xive_cpu *xc) * of the hypervisor interrupt (if any) */ cppr = ack & 0xff; - he = GETFIELD(TM_QW3_NSR_HE, (ack >> 8)); + he = ((ack >> 8) & TM_QW3_NSR_HE) >> (ffs(TM_QW3_NSR_HE) - 1); switch(he) { case TM_QW3_NSR_HE_NONE: /* Nothing to see here */ break;
The GETFIELD and SETFIELD macros in xive-regs.h aren't used except for a single instance of GETFIELD, so replace that and remove them. These macros are also defined in vas.h, so either those should be eventually replaced or the macros moved into bitops.h. Signed-off-by: Russell Currey <ruscur@russell.cc> --- arch/powerpc/include/asm/xive-regs.h | 6 ------ arch/powerpc/sysdev/xive/native.c | 2 +- 2 files changed, 1 insertion(+), 7 deletions(-)