| Message ID | 1498095579-6790-3-git-send-email-linuxram@us.ibm.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
On Wed, 2017-06-21 at 18:39 -0700, Ram Pai wrote: > Introduce set_hidx_slot() which sets the (H_PAGE_F_SECOND|H_PAGE_F_GIX) > bits at the appropriate location in the PTE of 4K PTE. In the > case of 64K PTE, it sets the bits in the second part of the PTE. Though > the implementation for the former just needs the slot parameter, it does > take some additional parameters to keep the prototype consistent. > > This function will come in handy as we work towards re-arranging the > bits in the later patches. > > Signed-off-by: Ram Pai <linuxram@us.ibm.com> > --- > arch/powerpc/include/asm/book3s/64/hash-4k.h | 7 +++++++ > arch/powerpc/include/asm/book3s/64/hash-64k.h | 16 ++++++++++++++++ > 2 files changed, 23 insertions(+) > > diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/powerpc/include/asm/book3s/64/hash-4k.h > index 9c2c8f1..cef644c 100644 > --- a/arch/powerpc/include/asm/book3s/64/hash-4k.h > +++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h > @@ -55,6 +55,13 @@ static inline int hash__hugepd_ok(hugepd_t hpd) > } > #endif > > +static inline unsigned long set_hidx_slot(pte_t *ptep, real_pte_t rpte, > + unsigned int subpg_index, unsigned long slot) > +{ > + return (slot << H_PAGE_F_GIX_SHIFT) & > + (H_PAGE_F_SECOND | H_PAGE_F_GIX); > +} > + A comment on top would help explain that 4k and 64k are different, 64k is a new layout. > #ifdef CONFIG_TRANSPARENT_HUGEPAGE > > static inline char *get_hpte_slot_array(pmd_t *pmdp) > diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h b/arch/powerpc/include/asm/book3s/64/hash-64k.h > index 3f49941..4bac70a 100644 > --- a/arch/powerpc/include/asm/book3s/64/hash-64k.h > +++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h > @@ -75,6 +75,22 @@ static inline unsigned long __rpte_to_hidx(real_pte_t rpte, unsigned long index) > return (pte_val(rpte.pte) >> H_PAGE_F_GIX_SHIFT) & 0xf; > } > > +static inline unsigned long set_hidx_slot(pte_t *ptep, real_pte_t rpte, > + unsigned int subpg_index, unsigned long slot) > +{ > + unsigned long *hidxp = (unsigned long *)(ptep + PTRS_PER_PTE); > + > + rpte.hidx &= ~(0xfUL << (subpg_index << 2)); > + *hidxp = rpte.hidx | (slot << (subpg_index << 2)); > + /* > + * Avoid race with __real_pte() > + * hidx must be committed to memory before committing > + * the pte. > + */ > + smp_wmb(); Whats the other paired barrier, is it in set_pte()? > + return 0x0UL; > +} We return 0 here and slot information for 4k pages, it is not that clear Balbir Singh.
On Mon, 2017-06-26 at 09:03 +1000, Balbir Singh wrote: > On Wed, 2017-06-21 at 18:39 -0700, Ram Pai wrote: > > Introduce set_hidx_slot() which sets the (H_PAGE_F_SECOND|H_PAGE_F_GIX) > > bits at the appropriate location in the PTE of 4K PTE. In the > > case of 64K PTE, it sets the bits in the second part of the PTE. Though > > the implementation for the former just needs the slot parameter, it does > > take some additional parameters to keep the prototype consistent. > > > > This function will come in handy as we work towards re-arranging the > > bits in the later patches. The name somewhat sucks. Something like pte_set_hash_slot() or something like that would be much more meaningful. > > Signed-off-by: Ram Pai <linuxram@us.ibm.com> > > --- > > arch/powerpc/include/asm/book3s/64/hash-4k.h | 7 +++++++ > > arch/powerpc/include/asm/book3s/64/hash-64k.h | 16 ++++++++++++++++ > > 2 files changed, 23 insertions(+) > > > > diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/powerpc/include/asm/book3s/64/hash-4k.h > > index 9c2c8f1..cef644c 100644 > > --- a/arch/powerpc/include/asm/book3s/64/hash-4k.h > > +++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h > > @@ -55,6 +55,13 @@ static inline int hash__hugepd_ok(hugepd_t hpd) > > } > > #endif > > > > +static inline unsigned long set_hidx_slot(pte_t *ptep, real_pte_t rpte, > > + unsigned int subpg_index, unsigned long slot) > > +{ > > + return (slot << H_PAGE_F_GIX_SHIFT) & > > + (H_PAGE_F_SECOND | H_PAGE_F_GIX); > > +} > > + > > A comment on top would help explain that 4k and 64k are different, 64k > is a new layout. > > > #ifdef CONFIG_TRANSPARENT_HUGEPAGE > > > > static inline char *get_hpte_slot_array(pmd_t *pmdp) > > diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h b/arch/powerpc/include/asm/book3s/64/hash-64k.h > > index 3f49941..4bac70a 100644 > > --- a/arch/powerpc/include/asm/book3s/64/hash-64k.h > > +++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h > > @@ -75,6 +75,22 @@ static inline unsigned long __rpte_to_hidx(real_pte_t rpte, unsigned long index) > > return (pte_val(rpte.pte) >> H_PAGE_F_GIX_SHIFT) & 0xf; > > } > > > > +static inline unsigned long set_hidx_slot(pte_t *ptep, real_pte_t rpte, > > + unsigned int subpg_index, unsigned long slot) > > +{ > > + unsigned long *hidxp = (unsigned long *)(ptep + PTRS_PER_PTE); > > + > > + rpte.hidx &= ~(0xfUL << (subpg_index << 2)); > > + *hidxp = rpte.hidx | (slot << (subpg_index << 2)); > > + /* > > + * Avoid race with __real_pte() > > + * hidx must be committed to memory before committing > > + * the pte. > > + */ > > + smp_wmb(); > > Whats the other paired barrier, is it in set_pte()? > > > + return 0x0UL; > > +} > > We return 0 here and slot information for 4k pages, it is not that > clear > > Balbir Singh.
On Mon, Jun 26, 2017 at 09:03:18AM +1000, Balbir Singh wrote: > On Wed, 2017-06-21 at 18:39 -0700, Ram Pai wrote: > > Introduce set_hidx_slot() which sets the (H_PAGE_F_SECOND|H_PAGE_F_GIX) > > bits at the appropriate location in the PTE of 4K PTE. In the > > case of 64K PTE, it sets the bits in the second part of the PTE. Though > > the implementation for the former just needs the slot parameter, it does > > take some additional parameters to keep the prototype consistent. > > > > This function will come in handy as we work towards re-arranging the > > bits in the later patches. > > > > Signed-off-by: Ram Pai <linuxram@us.ibm.com> > > --- > > arch/powerpc/include/asm/book3s/64/hash-4k.h | 7 +++++++ > > arch/powerpc/include/asm/book3s/64/hash-64k.h | 16 ++++++++++++++++ > > 2 files changed, 23 insertions(+) > > > > diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/powerpc/include/asm/book3s/64/hash-4k.h > > index 9c2c8f1..cef644c 100644 > > --- a/arch/powerpc/include/asm/book3s/64/hash-4k.h > > +++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h > > @@ -55,6 +55,13 @@ static inline int hash__hugepd_ok(hugepd_t hpd) > > } > > #endif > > > > +static inline unsigned long set_hidx_slot(pte_t *ptep, real_pte_t rpte, > > + unsigned int subpg_index, unsigned long slot) > > +{ > > + return (slot << H_PAGE_F_GIX_SHIFT) & > > + (H_PAGE_F_SECOND | H_PAGE_F_GIX); > > +} > > + > > A comment on top would help explain that 4k and 64k are different, 64k > is a new layout. ok. > > > #ifdef CONFIG_TRANSPARENT_HUGEPAGE > > > > static inline char *get_hpte_slot_array(pmd_t *pmdp) > > diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h b/arch/powerpc/include/asm/book3s/64/hash-64k.h > > index 3f49941..4bac70a 100644 > > --- a/arch/powerpc/include/asm/book3s/64/hash-64k.h > > +++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h > > @@ -75,6 +75,22 @@ static inline unsigned long __rpte_to_hidx(real_pte_t rpte, unsigned long index) > > return (pte_val(rpte.pte) >> H_PAGE_F_GIX_SHIFT) & 0xf; > > } > > > > +static inline unsigned long set_hidx_slot(pte_t *ptep, real_pte_t rpte, > > + unsigned int subpg_index, unsigned long slot) > > +{ > > + unsigned long *hidxp = (unsigned long *)(ptep + PTRS_PER_PTE); > > + > > + rpte.hidx &= ~(0xfUL << (subpg_index << 2)); > > + *hidxp = rpte.hidx | (slot << (subpg_index << 2)); > > + /* > > + * Avoid race with __real_pte() > > + * hidx must be committed to memory before committing > > + * the pte. > > + */ > > + smp_wmb(); > > Whats the other paired barrier, is it in set_pte()? __real_pte() reads the hidx. The smp_rmb() is in that function. > > > + return 0x0UL; > > +} > > We return 0 here and slot information for 4k pages, it is not that > clear We return 0 here and commit the 4k-hpte hidx. RP
On Sun, Jun 25, 2017 at 11:02:58PM -0500, Benjamin Herrenschmidt wrote: > On Mon, 2017-06-26 at 09:03 +1000, Balbir Singh wrote: > > On Wed, 2017-06-21 at 18:39 -0700, Ram Pai wrote: > > > Introduce set_hidx_slot() which sets the (H_PAGE_F_SECOND|H_PAGE_F_GIX) > > > bits at the appropriate location in the PTE of 4K PTE. In the > > > case of 64K PTE, it sets the bits in the second part of the PTE. Though > > > the implementation for the former just needs the slot parameter, it does > > > take some additional parameters to keep the prototype consistent. > > > > > > This function will come in handy as we work towards re-arranging the > > > bits in the later patches. > > The name somewhat sucks. Something like pte_set_hash_slot() or > something like that would be much more meaningful. ok. pte_set_hash_slot() sounds good. RP
diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/powerpc/include/asm/book3s/64/hash-4k.h index 9c2c8f1..cef644c 100644 --- a/arch/powerpc/include/asm/book3s/64/hash-4k.h +++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h @@ -55,6 +55,13 @@ static inline int hash__hugepd_ok(hugepd_t hpd) } #endif +static inline unsigned long set_hidx_slot(pte_t *ptep, real_pte_t rpte, + unsigned int subpg_index, unsigned long slot) +{ + return (slot << H_PAGE_F_GIX_SHIFT) & + (H_PAGE_F_SECOND | H_PAGE_F_GIX); +} + #ifdef CONFIG_TRANSPARENT_HUGEPAGE static inline char *get_hpte_slot_array(pmd_t *pmdp) diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h b/arch/powerpc/include/asm/book3s/64/hash-64k.h index 3f49941..4bac70a 100644 --- a/arch/powerpc/include/asm/book3s/64/hash-64k.h +++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h @@ -75,6 +75,22 @@ static inline unsigned long __rpte_to_hidx(real_pte_t rpte, unsigned long index) return (pte_val(rpte.pte) >> H_PAGE_F_GIX_SHIFT) & 0xf; } +static inline unsigned long set_hidx_slot(pte_t *ptep, real_pte_t rpte, + unsigned int subpg_index, unsigned long slot) +{ + unsigned long *hidxp = (unsigned long *)(ptep + PTRS_PER_PTE); + + rpte.hidx &= ~(0xfUL << (subpg_index << 2)); + *hidxp = rpte.hidx | (slot << (subpg_index << 2)); + /* + * Avoid race with __real_pte() + * hidx must be committed to memory before committing + * the pte. + */ + smp_wmb(); + return 0x0UL; +} + #define __rpte_to_pte(r) ((r).pte) extern bool __rpte_sub_valid(real_pte_t rpte, unsigned long index); /*
Introduce set_hidx_slot() which sets the (H_PAGE_F_SECOND|H_PAGE_F_GIX) bits at the appropriate location in the PTE of 4K PTE. In the case of 64K PTE, it sets the bits in the second part of the PTE. Though the implementation for the former just needs the slot parameter, it does take some additional parameters to keep the prototype consistent. This function will come in handy as we work towards re-arranging the bits in the later patches. Signed-off-by: Ram Pai <linuxram@us.ibm.com> --- arch/powerpc/include/asm/book3s/64/hash-4k.h | 7 +++++++ arch/powerpc/include/asm/book3s/64/hash-64k.h | 16 ++++++++++++++++ 2 files changed, 23 insertions(+)