Show patches with: Submitter = Philippe Bergheaud       |    Archived = No       |   8 patches
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v2] ocxl: control via sysfs whether the FPGA is reloaded on a link reset [v2] ocxl: control via sysfs whether the FPGA is reloaded on a link reset - - - - 61- 2020-03-16 Philippe Bergheaud Superseded
ocxl: control via sysfs whether the FPGA is reloaded on a link reset ocxl: control via sysfs whether the FPGA is reloaded on a link reset - - - - 61- 2020-03-11 Philippe Bergheaud Superseded
[v4,2/2] cxl: Report the tunneled operations status [v4,1/2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode 1 - - - --- 2018-05-14 Philippe Bergheaud Accepted
[v4,1/2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode [v4,1/2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode 1 - 1 - --- 2018-05-14 Philippe Bergheaud Accepted
[v3,2/2] cxl: Report the tunneled operations status [v3,1/2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode - - - - --- 2018-04-25 Philippe Bergheaud Superseded
[v3,1/2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode [v3,1/2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode 1 - 1 - --- 2018-04-25 Philippe Bergheaud Superseded
[v2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode [v2] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode - - 1 - --- 2018-04-13 Philippe Bergheaud Superseded
cxl: Set the PBCQ Tunnel BAR register when enabling capi mode cxl: Set the PBCQ Tunnel BAR register when enabling capi mode - - - - --- 2018-04-12 Philippe Bergheaud Superseded