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[0/4] VSX 32-byte vector paired load/store instructions

Message ID 20200630055307.1154135-1-bala24@linux.ibm.com (mailing list archive)
Headers show
Series VSX 32-byte vector paired load/store instructions | expand

Message

Balamuruhan S June 30, 2020, 5:53 a.m. UTC 
VSX vector paired instructions operates with octword (32-byte) operand
for loads and stores between storage and a pair of two sequential Vector-Scalar
Registers (VSRs). There are 4 word instructions and 2 prefixed instructions
that provides this 32-byte storage access operations - lxvp, lxvpx, stxvp,
stxvpx, plxvpx, pstxvpx.

Emulation infrastructure doesn't have support for these instructions, to
operate with 32-byte storage access and to operate with 2 VSX registers.
This patch series enables the instruction emulation support and adds test
cases for them respectively.

Balamuruhan S (4):
  powerpc/sstep: support new VSX vector paired storage access
    instructions
  powerpc/sstep: support emulation for vsx vector paired storage access
    instructions
  powerpc ppc-opcode: add opcodes for vsx vector paired instructions
  powerpc sstep: add testcases for vsx load/store instructions

 arch/powerpc/include/asm/ppc-opcode.h |  11 ++
 arch/powerpc/include/asm/sstep.h      |   2 +-
 arch/powerpc/lib/sstep.c              | 102 +++++++++-
 arch/powerpc/lib/test_emulate_step.c  | 273 ++++++++++++++++++++++++++
 4 files changed, 378 insertions(+), 10 deletions(-)


base-commit: 64677779e8962c20b580b471790fe42367750599