diff mbox series

pwm: lpc18xx-sct: Fix a comment to match code

Message ID 20221108153013.132514-1-u.kleine-koenig@pengutronix.de
State Accepted
Headers show
Series pwm: lpc18xx-sct: Fix a comment to match code | expand

Commit Message

Uwe Kleine-König Nov. 8, 2022, 3:30 p.m. UTC
lpc18xx_pwm_probe() only ensures clk_rate <= NSEC_PER_SEC, the following
reasoning is right even under this slightly lesser condition.

Fixes: 8933d30c5f46 ("pwm: lpc18xx: Fix period handling")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
 drivers/pwm/pwm-lpc18xx-sct.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Vladimir Zapolskiy Nov. 8, 2022, 6:40 p.m. UTC | #1
On 11/8/22 17:30, Uwe Kleine-König wrote:
> lpc18xx_pwm_probe() only ensures clk_rate <= NSEC_PER_SEC, the following
> reasoning is right even under this slightly lesser condition.
> 
> Fixes: 8933d30c5f46 ("pwm: lpc18xx: Fix period handling")
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
>   drivers/pwm/pwm-lpc18xx-sct.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pwm/pwm-lpc18xx-sct.c b/drivers/pwm/pwm-lpc18xx-sct.c
> index 763f2e3a146d..378e1df944dc 100644
> --- a/drivers/pwm/pwm-lpc18xx-sct.c
> +++ b/drivers/pwm/pwm-lpc18xx-sct.c
> @@ -175,7 +175,7 @@ static void lpc18xx_pwm_config_duty(struct pwm_chip *chip,
>   	u32 val;
>   
>   	/*
> -	 * With clk_rate < NSEC_PER_SEC this cannot overflow.
> +	 * With clk_rate <= NSEC_PER_SEC this cannot overflow.
>   	 * With duty_ns <= period_ns < max_period_ns this also fits into an u32.
>   	 */
>   	val = mul_u64_u64_div_u64(duty_ns, lpc18xx_pwm->clk_rate, NSEC_PER_SEC);

Acked-by: Vladimir Zapolskiy <vz@mleia.com>

--
Best wishes,
Vladimir
diff mbox series

Patch

diff --git a/drivers/pwm/pwm-lpc18xx-sct.c b/drivers/pwm/pwm-lpc18xx-sct.c
index 763f2e3a146d..378e1df944dc 100644
--- a/drivers/pwm/pwm-lpc18xx-sct.c
+++ b/drivers/pwm/pwm-lpc18xx-sct.c
@@ -175,7 +175,7 @@  static void lpc18xx_pwm_config_duty(struct pwm_chip *chip,
 	u32 val;
 
 	/*
-	 * With clk_rate < NSEC_PER_SEC this cannot overflow.
+	 * With clk_rate <= NSEC_PER_SEC this cannot overflow.
 	 * With duty_ns <= period_ns < max_period_ns this also fits into an u32.
 	 */
 	val = mul_u64_u64_div_u64(duty_ns, lpc18xx_pwm->clk_rate, NSEC_PER_SEC);