diff mbox series

PCI/MSI: Set device flag indicating only 32-bit MSI support

Message ID 20201117145728.4516-1-vidyas@nvidia.com
State Superseded
Headers show
Series PCI/MSI: Set device flag indicating only 32-bit MSI support | expand

Commit Message

Vidya Sagar Nov. 17, 2020, 2:57 p.m. UTC
There are devices (Ex:- Marvell SATA controller) that don't support
64-bit MSIs and the same is advertised through their MSI capability
register. Set no_64bit_msi flag explicitly for such devices in the
MSI setup code so that the msi_verify_entries() API would catch
if the MSI arch code tries to use 64-bit MSI.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
 drivers/pci/msi.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Comments

Bjorn Helgaas Nov. 20, 2020, 9:30 p.m. UTC | #1
On Tue, Nov 17, 2020 at 08:27:28PM +0530, Vidya Sagar wrote:
> There are devices (Ex:- Marvell SATA controller) that don't support
> 64-bit MSIs and the same is advertised through their MSI capability
> register. 

I *think* you're saying these devices behave correctly per spec: they
don't support 64-bit MSI, and they don't advertise support for 64-bit
MSI.  Right?

> Set no_64bit_msi flag explicitly for such devices in the
> MSI setup code so that the msi_verify_entries() API would catch
> if the MSI arch code tries to use 64-bit MSI.

And you want msi_verify_entries() to catch attempts by the arch code
to assign a 64-bit MSI address?

That sounds OK, but the error message ("Device has broken 64-bit MSI")
is not appropriate if the device is actually *not* broken.

> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
>  drivers/pci/msi.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
> index d52d118979a6..af49da28854e 100644
> --- a/drivers/pci/msi.c
> +++ b/drivers/pci/msi.c
> @@ -581,10 +581,12 @@ msi_setup_entry(struct pci_dev *dev, int nvec, struct irq_affinity *affd)
>  	entry->msi_attrib.multi_cap	= (control & PCI_MSI_FLAGS_QMASK) >> 1;
>  	entry->msi_attrib.multiple	= ilog2(__roundup_pow_of_two(nvec));
>  
> -	if (control & PCI_MSI_FLAGS_64BIT)
> +	if (control & PCI_MSI_FLAGS_64BIT) {
>  		entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
> -	else
> +	} else {
>  		entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
> +		dev->no_64bit_msi = 1;
> +	}
>  
>  	/* Save the initial mask status */
>  	if (entry->msi_attrib.maskbit)
> -- 
> 2.17.1
>
Vidya Sagar Nov. 24, 2020, 3:57 a.m. UTC | #2
On 11/21/2020 3:00 AM, Bjorn Helgaas wrote:
> External email: Use caution opening links or attachments
> 
> 
> On Tue, Nov 17, 2020 at 08:27:28PM +0530, Vidya Sagar wrote:
>> There are devices (Ex:- Marvell SATA controller) that don't support
>> 64-bit MSIs and the same is advertised through their MSI capability
>> register.
> 
> I *think* you're saying these devices behave correctly per spec: they
> don't support 64-bit MSI, and they don't advertise support for 64-bit
> MSI.  Right?
Yes. That is what I intended to say.

> 
>> Set no_64bit_msi flag explicitly for such devices in the
>> MSI setup code so that the msi_verify_entries() API would catch
>> if the MSI arch code tries to use 64-bit MSI.
> 
> And you want msi_verify_entries() to catch attempts by the arch code
> to assign a 64-bit MSI address?
Yes.

> 
> That sounds OK, but the error message ("Device has broken 64-bit MSI")
> is not appropriate if the device is actually *not* broken.
Ok. I didn't change the existing error message. I'll change it to cover 
both the scenarios i.e. either the device is broken or the device 
doesn't really support 64-bit MSI.

> 
>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
>> ---
>>   drivers/pci/msi.c | 6 ++++--
>>   1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
>> index d52d118979a6..af49da28854e 100644
>> --- a/drivers/pci/msi.c
>> +++ b/drivers/pci/msi.c
>> @@ -581,10 +581,12 @@ msi_setup_entry(struct pci_dev *dev, int nvec, struct irq_affinity *affd)
>>        entry->msi_attrib.multi_cap     = (control & PCI_MSI_FLAGS_QMASK) >> 1;
>>        entry->msi_attrib.multiple      = ilog2(__roundup_pow_of_two(nvec));
>>
>> -     if (control & PCI_MSI_FLAGS_64BIT)
>> +     if (control & PCI_MSI_FLAGS_64BIT) {
>>                entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
>> -     else
>> +     } else {
>>                entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
>> +             dev->no_64bit_msi = 1;
>> +     }
>>
>>        /* Save the initial mask status */
>>        if (entry->msi_attrib.maskbit)
>> --
>> 2.17.1
>>
diff mbox series

Patch

diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index d52d118979a6..af49da28854e 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -581,10 +581,12 @@  msi_setup_entry(struct pci_dev *dev, int nvec, struct irq_affinity *affd)
 	entry->msi_attrib.multi_cap	= (control & PCI_MSI_FLAGS_QMASK) >> 1;
 	entry->msi_attrib.multiple	= ilog2(__roundup_pow_of_two(nvec));
 
-	if (control & PCI_MSI_FLAGS_64BIT)
+	if (control & PCI_MSI_FLAGS_64BIT) {
 		entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
-	else
+	} else {
 		entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
+		dev->no_64bit_msi = 1;
+	}
 
 	/* Save the initial mask status */
 	if (entry->msi_attrib.maskbit)