From patchwork Tue Nov 17 14:57:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vidya Sagar X-Patchwork-Id: 1401587 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.a=rsa-sha256 header.s=n1 header.b=ctuRNIY3; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Cb8FB3r55z9s0b for ; Wed, 18 Nov 2020 01:57:50 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729198AbgKQO5h (ORCPT ); Tue, 17 Nov 2020 09:57:37 -0500 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:9228 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725779AbgKQO5g (ORCPT ); Tue, 17 Nov 2020 09:57:36 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Tue, 17 Nov 2020 06:57:46 -0800 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 17 Nov 2020 14:57:34 +0000 Received: from vidyas-desktop.nvidia.com (10.124.1.5) by mail.nvidia.com (172.20.187.10) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Tue, 17 Nov 2020 14:57:32 +0000 From: Vidya Sagar To: , , , CC: , , , , , Subject: [PATCH] PCI/MSI: Set device flag indicating only 32-bit MSI support Date: Tue, 17 Nov 2020 20:27:28 +0530 Message-ID: <20201117145728.4516-1-vidyas@nvidia.com> X-Mailer: git-send-email 2.17.1 X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1605625066; bh=ZTUMvtaqennQ1JdMmdsb/E7562d9dVUi9teJOnYd07c=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:X-NVConfidentiality: MIME-Version:Content-Type; b=ctuRNIY359o8unfTMllbc5J+MZOGVs+aYUuOr65JDk/A1YkFhI2XNj5plSaSw9YDs 7KEKrrn7MNcsBkOiMtm0RCDGFAPsDSev8TSWKtpq5WuvWcT+ki2dILqzRt0NPIT7Gd UdOClACtK/qkqKp8wwDkIQ8FD8BW7LBdnM8fF4iSUj/XUbzUwn2qwTO+mWPhuQVVqk YVegRtESl73kBT4GXImeAAeF3t4NyJUO06yLURaQwU9orqJvJe4JteRIA0lJmBvVXS KhD/9CV//VrQTdFZZLh3JgqUo87F+joeNdgFH0x6pllhyMUZmB60cf8Vva9u4p/Pgi pUxcnsMDtHjZA== Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org There are devices (Ex:- Marvell SATA controller) that don't support 64-bit MSIs and the same is advertised through their MSI capability register. Set no_64bit_msi flag explicitly for such devices in the MSI setup code so that the msi_verify_entries() API would catch if the MSI arch code tries to use 64-bit MSI. Signed-off-by: Vidya Sagar --- drivers/pci/msi.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index d52d118979a6..af49da28854e 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -581,10 +581,12 @@ msi_setup_entry(struct pci_dev *dev, int nvec, struct irq_affinity *affd) entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1; entry->msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec)); - if (control & PCI_MSI_FLAGS_64BIT) + if (control & PCI_MSI_FLAGS_64BIT) { entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64; - else + } else { entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32; + dev->no_64bit_msi = 1; + } /* Save the initial mask status */ if (entry->msi_attrib.maskbit)